============================================================================= Intel(R) Server Platforms SE7320EP2/SE7525RP2 BIOS RELEASE NOTES ============================================================================= INTEL Enterprise Platform & Services Marketing Intel Corporation 2111 N.E. 25th Avenue, Hillsboro, OR 97124 USA ============================================================================= DATE: May, 2006 TO: Intel Server Platform SE7320EP2/SE7525RP2 Customers SUBJECT: BIOS Release Notes: P.05 (build 020) ============================================================================= Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. 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Copyright(c) 2005 Intel Corporation. ============================================================================= ABOUT THIS RELEASE ============================================================================= Build # : 020 Build Stamp : SE7320EP20.86B.P.05.00.0020.121620050818 SE7525RP20.86B.P.05.00.0020.121620050818 Build Date : May. 2006 ============================================================================= BIOS COMPONENTS/CONTENTS ============================================================================= Processor stepping(s) supported: Intel(R) Xeon(TM) Processors MP Microcode Versions: Filename | Description | Stepping(s) | -------------+------------------------------+--------------------------------------------- M1DF3417.TXT | Assembly format, Revision 17 | D-0 Intel(R) Xeon(R) 800MHz FSB/1M L2 Cache| MBDF4117.TXT | Assembly format, Revision 17 | E-0 Intel(R) Xeon(R) 800MHz FSB/1M L2 Cache| M9DF4305.TXT | Assembly format, Revision 05 | N-0 Intel(R) Xeon(R) 800MHz FSB/2M L2 Cache| MBDF4903.TXT | Assembly format, Revision 03 | G-1 Intel(R) Xeon(R) 800MHz FSB/2M L2 Cache| M5DF4A02.TXT | Assembly format, Revision 02 | R-0 Intel(R) Xeon(R) 800MHz FSB/2M L2 Cache| System hardware configurations supported: SE7320EP2/SE7525RP2 revision FAB 4 (Production) ============================================================================= SYSTEM FIRMWARE REQUIREMENTS/REVISIONS ============================================================================= NONE ============================================================================= IMPORTANT INSTALLATION NOTES ============================================================================= IMPORTANT NOTES: 1. Note the settings of the SETUP parameters. Enter SETUP by hitting the F2 key during boot up. Write down the settings for each of parameters. At the end of the BIOS update process you should set the parameters to default values by hitting the F9 key, and then re-enter these values you have written down. 2. Place the bootable floppy containing the BIOS into drive a: of the system that you want to upgrade and boot the system while the floppy diskette is in the drive. 3. There are 2 methods to flash BIOS. 3.1 Method 1: (1) Copy all of the following files into the same folder in Hard Drive or bootable USB Disk Key : BIO\1.bat BIO\AFUDOS.exe BIO\T71_P05.rom (2) Go to this folder to run 1.bat and update finishes automatically. 3.2 Method 2: (1) Go to BIN folder and execute T71_P05.EXE to make bootable floppy. (2) Use this bootable floppy to boot and update finishes automatically. ***************************************** *** USB-Disk Recovery Feature Details *** ***************************************** - Build Recovery Storage 1. Plug in the USB DISK_ON_KEY 2. Boot the system to DOS on a bootable floppy 3. Then from the floppy, format the USB DISK_ON_KEY to FAT 12 or FAT 16 4. Rename ROM file to AMIBOOT.ROM and copy it to USB DISK_ON_KEY. - Execute BIOS Recovery 1. User Forced Recovery - set Recovery Boot Jumper J17 (10-11) - Insert the Recovery storage into USB port. - Power on system - System boot and the debug port will display the flash progress. - When flash complete, power off system and set jumper back to Normal mode J17 (9-10) 2. Auto Recovery - If system ROM is damaged (checksum BAD), system will perform BIOS recovery automatically. **NOTE** : The recovery only supports the storages of both type FAT12 & FAT16. *********************************************** *** AMI AFUDOS Flash Feature Details *** *********************************************** - AFUDOS.EXE V1.33 - This update processing takes 3 to 4 minutes. Never turn off the system during the update processing. The following message appears when the update processing is finished: Reading file ........ done Erasing flash ....... done Writing flash ....... done Verifying flash ..... done Erasing BootBlock ... done Writing BootBlock ... done Verifying BootBlock.. done If the system does not restart, TURN THE POWER OFF, THEN ON. AMI Firmware Update Utility - Version 1.33 Copyright (C)2004 American Megatrends, Inc. All rights reserved. afudos /i [/o] [/n] [/p[b][n][c]] [/r] [/s] [/k[N]] [/q] [/h] /n - don't check ROM ID /pbc - b - Program Boot Block c - Destroy System CMOS /r - registry path to store result of operation (Windows version) /k0 - Program Non-Critical Block 0 (OEM Logo & User Binaries) /c - Skip non-critical blocks /s - Leave signature in BIOS /q - Silent execution /h - print help /t - Display ROM ID string /c0 - Program Main BIOS and Non-Critical Block 0 (OEM Logo & User Binaries) /d - Compare ROM file (skips flashing) /u -Display ROM ID ============================================================================= KNOWN ISSUES/WORKAROUNDS ============================================================================= - End user should always use the following command to flash bios. C:\afudos /i /pb /c0 /i - ROM file to update BIOS /pb - Flash Boot Block /c0 - Flash Non-Critical Block 0 (OEM Logo & User Binaries) and main BIOS Image. - User should not flash Non-Critical Block 1 (Backup NVRAM). Otherwise, the GPNV fault tolerance may malfunction. - The recovery mode supports FAT12 and FAT16 only. - The BIOS setup item "Maximum CPUID Value Limit" must be enabled for installing some legacy OSes (NT4.0 for example) which do not support it. - User could enable/disable 'Hardware Prefetcher' and 'Adjacent Cache Line Prefetch' to improve the performance. ============================================================================= FEATURES ADDED ============================================================================= Build 020: P.05 - N/A Build 019: RC01.05 - Added processor mixed Voltage combinations Feature. - Added Intel(R) Xeon(R) 800MHz FSB/1M L2 Cache G-1 microcode Revision 3. - Integrated E7520_Error_reporting_rev027. Build 018: P.04 - Removed Intel(R) Xeon(R) 800MHz FSB/1M L2 Cache G-1 Processor Microcode. Build 017: RC02.04 - Set the Echo TPR Disable bit (CPU MSR 1A0h bit 23) for R-0 processors. - Follows E7520_BSU_v1_07.pdf clarification #1 for recommended register settings. Build 016: RC01.04 - Added Intel(R) Xeon(R) 800MHz FSB/1M L2 Cache G-1 microcode Revision 3, and R-0 Intel(R) Xeon(R) 800MHz FSB/2M L2 Cache microcode Revision 2. - Latest Mixed Processor Stepping Changes. - Least Featured BSP Changes. - Updated USB module to 8.00.04_USB-2.24.00-Beta5. - Updated AMI TAG USB0089.3, USB0100, USB0107, USB0109, USB0111, USB0112. - MAX oayload sixe and Read Request Size from 128 to 256. - Implement WOL from S5 option in BIOS setup. - PCI express error reporting SERR setting. - Set the region F0000 as memory-mapped and un-cacheable. Build 015: P.03 - N/A Build 014: RC01.03 - Set SMBIOS Type 15 structure Log Header Format as BIOS Vendor. - Delay during POST to hit key. - Update new Processor Microcode for D-0, E-0 and N-0 (SRV_P_44). - To display POST error message to identify that all processors must be of the same voltage in mixed stepping systems. Build 013: P.02 - N/A Build 012: RC02.02 - Enabled "INT15_DA12_SUPPORT" for support INT 15h, Function Da12h: Cache Control . - Restore SMBIOS Type 15 structure Access Method as GPNV function. Build 011: RC01.02 - SMBIOS event log type 15 to report the memory-map access address. - Set ˇ§PCI_MAX_BUSSESˇ¨ to 7Fh and also ˇ§PCI_MAX_BUSSESˇ¨ token in CORE.SDL has also to be set to 128 to pass PTC test case 1.1 for PCI SIG. - Change IST default and wording in BIOS Setup to match EPS v0.95. Build 010: P.01 - N/A Build 009: RC02 - Removed chassis type "SC5300" in BIOS setup. - Removed other language and the only support language in BIOS Setup is English. - Bug fixed : Incorrect system fan table for Pre-Production (Fab3) board. Build 008: RC01 - Follow SE7320EP2/SE7525RP2 config_sheet_v0 52.xls to implement the automatic fan control for different chassis on Pre-Production (Fab2 and Fab3) board. - Prevent the 3-wire fans from causing noise. - Prevent the PCI memory from always allocating 1 GB when Memory Remapping is disabled. - Support the WOL from S5 for legacy and ACPI OS. - Update onboard LSI53C1020(A)/1030 IS option ROM to 5.11.03 from 5.11.02. - Update onboard LSI53C1020(A)/1030 IME option ROM to 5.10.04 from 5.10.03. - Update onboard LSI53C1020(A)/1030 IS/IME firmware to 1.03.39 from 1.03.37. Build 007: B01 - Include AMI solution to fix PCI SIG issue. - SE7320EP2/SE7525RP2 config_sheet_v0.52.xls to implement the FAN configuration on Pre-Production (Fab2 and Fab3) board. - Bug fixed : Memory end address in SMBIOS type19 and size in SMBIOS type17 are incorrect. - Using Non-Critical Block 1 to implement GPNV fault tolerance to prevent UUID from missing. - Display the string of SMBIOS Type1 Manufacturer to top line of the POST diagnostic screen if the string is not 'Intel'. - Include the multi-language for un-translated string. Build 006: BC03 - Set the SYS FAN 5 to measure at any time to prevent the noise on Intel(R) Server Chassis SC5300. - Removed the unnecessary Colon mark from Processor and Server Management menu. - Display POST Error Message if System Event log is full. Build 005: BC02 - Implement the SSID/SSVID for Eden Prairie SKU3. - Removed the SMBIOS Type34/35/36 26/27/28. - Get the OEM string from SMBIOS type 11 and update to memory range "000fe000-000fffff". - Don't log the Memory Buffer error because it is non-fatal error. - Raise NMI for FSB/HI fatal error. Build 004: BC01 - Update Intel(R) Xeon(R) 800MHz FSB/1M L2 Cache E-0 microcode to Revision 12 from Revision D. - Prevent the system FANs always run in maximum duty cycle for Pre-Production (Fab2) board. Build 003: A01 - Update onboard LSI53C1020(A)/1030 IS option ROM to 5.11.02 from 5.11.01. - Change onboard LSI53C1020(A)/1030 IS/IME firmware to 1.03.37 from 1.03.39. - Change the Chassis type to 'SC5295E' from 'Palm Beach'. - Implement the Hyper-Threading Technology in MPS for FreeBSD. - Add the Hardware Prefetcher and Adjacent Cache Line Prefetch to CPU menu and change the default setting to disable from enable. - Modify the Administrator/User Password and F2 Setup Usage Model. Build 002: AC01 - Turn off power LED when system is in S5 state. - Implement SMBIOS Structure Type 8 for SE7320EP2/SE7525RP2. - Update the ISM module to ISM_00_01_03 from ISM_00_01_00. - Changed the the slave address of the HM SMBus to 58h from 5Eh. Build 001: X01 - Initial release. ============================================================================= ISSUES FIXED ============================================================================= Build 020: P.05 - System all wake-up function are disabled while "Wake On Lan" been Disabled. Build 019: RC01.05 - Connecting USB keyboard but PS2 keyboard resulted in "Keyboard Nonfunctional" event log, but there was keyboard connected to system. - Event logs found when BIOS event logging was Disabled. - SMBIOS Type 20 got zero length for address space. - In BIOS setup, "Power Management Features/Wake On LAN" option was malfunction. - Least featured BSP change check failed. - Cert-WHQL-HCT12.1.01 Unreported Memory and I/O port test failed. - Pressing "F12" to boot from NIC, but it didn't follow the NIC prioriy in Boot Device Priority in BIOS setup. - BIOS tried booting from NIC device twice when pressing "F12" to boot from NIC. Build 018: P.04 - When MCH stepping more than C2, BIOS can't follow E7520_BSU_v1_07.pdf clarification #1 for recommended register settings. Build 017: RC02.04 - N/A Build 016: RC01.04 - Summary screen has some string error. - [SMBIOS] There is some error in Type 0. - [SMBIOS] Type 0 is not correct. - The function "Assert NMI on SERR" test fails. - [BEL] SMDXREF test is failed. - [X] Flow Control Settings in BIOS P08 Other Than RTS-CTS Causes Platform Hangs. - Serial can not work when onboard VGA is disabled. - Fixed E0000-EFFFF can't be allocated properly. - Intel(R) Xeon(R) 800MHz FSB/2M L2 Cache R-0 processor CPUID display issue in BIOS SETUP. - CPU frequency display different in the POST screen and BIOS setup with two different frequency R0 stepping processors. Build 015: P.03 - N/A Build 014: RC01.03 - Keys Non functional During Splash Screen. -System blue screens while calling from 32-bit protected mode. -Cert-WHQL-HCT12.1.01 Unreported Memory Test Fails on SKU3. -nVidia* PCIexpress video cards put black bars on BIOS splash screen on BIOS P.02. -Insufficient Memory to Shadow PCI ROM Message using nVidia QuadroFX3400 PCIE. -nVidia graphics cards do not work on GP2. -USB mouse not working on Intel RAID cards BIOS Console. Build 013: P.02 - N/A Build 012: RC02.02 - Win2k3EM64T EE BSOD after chipset install with Marvell SysKonnect 9E21D & 9E22D Build 011: RC01.02 - BIOS not implementing E7525 chipset errata #22 properly. - DBS malfunction when Hyper-Threading is disabled. - Abnormal OEMLogo when installing customer logo. - SMBIOS type 15 doesn't report correct status when event log full. Build 010: P01 - RC02 BIOS defaults to SC5275E Chassis Type. Build 009: RC02 - Memory Sparing Nonfunctional after the number of SBE's exceed threshold level. - RCO1 BIOS has option for SC5300. - BIOS RC01 3-pin Fan control not working. - Thermal sensor for SC5295-E not correct on Pre-Production (Fab3) board. - SET_SLOT_POWER Message is incorrect. - [M] Medusa Labs BIOS typos. Build 008: RC01 - [WHQL] SE7320EP2 SKU 3/SE7525RP2 fails ACPI Verifier test. - Copyright Year Missing During POST - Operating system reports incorrect memory size. - SE7320EP2(All SKUs) Power Light blinks when in hibernate;light should be off. - "Processor speeds mismatched" malfunction. - Unix floppy boot issue from Kraftway. Build 007: B01 - BIOS Setup shows memory as spare when having Dual rank DIMMs. - References to E7520 should be removed during POST. Build 006: BC03 - OS fail to install with Intel SRCZCRX (Palo Verde). - Copyright information incorrect during post screen. - Copyright information incorrect in BIOS Setup Screen. - Headless Server support nonfunctional. - SEL Type 15 SMBIOS structure length is incorrect. Build 005: BC02 - USB eye diagram fails. - Memory sparing enabled for invlaid configuration. - PERR SMI handler failed to use ICH GPIO 4 to detect PERR. Build 004: BC01 - [BEL] Ibuapi test failed. - Marvell DOS-Diagnostics hangs at run-time. - System keeps rebooting without video when installed with Mixed Processors. - System memory cannot reduce to 1 bank when BIOS detects a corrupted SPD. Build 003: A01 - System hangs with Maxtor USB HDD at POST. - The incorrect DIMM size in the SMBIOS Type 17 & Type 20 for DDR2. Build 002: AC01 - Incorrect SKU ID. - Event log cannot display in the setup menu. - System hangs up when select 'IS' (Integrated Striping) as SCSI mode. - Missing Uncorrectable ECC event log on SE7320EP2/SE7525RP2. - System hangs up when disable NIC1 or NIC2. - Incorrect reporting voltage to SMBIOS type26. Build 001: X01 - Initial release. ============================================================================= REFERENCE MATERIAL ============================================================================= Intel(R) Server Platform SE7320EP2 Technical Product Specification (TPS) Intel(R) WorkStation Platform SE7525RP2 Technical Product Specification (TPS) Technical Support: http://support.intel.com [END OF RELEASE NOTES]