Firmware and BIOS Update Package for the Intel(R) Server Board S3200SH, S3210SH Intel Corporation 2111 N.E. 25th Avenue, Hillsboro, OR 97124 USA BIOS: S3200X38.86B.00.00.0039 Build Date : Mar. 4, 2008 Integrated BMC: 29 (Requires v24 be installed before update) FRUSDR: FSH1_12 !!!BIOS must be at R0020 and Integrated BMC FW at v.24 before running this update. This package may be used with: - Intel(R) Deployment Assistant 1.4 (on the CD or from support.intel.com) - Intel(R) One-boot Flash Update (OFU) v9.62 or later (support.intel.com) - the embedded EFI environment (see EFI.txt) or - Windows Preboot Execution Environment (WinPE) - availabe in WinPE folder. Processor supported: Quad-Core Intel(R) Xeon(R) Processor 3300 Series Dual-Core Intel(R) Xeon(R) Processor 3200 Series Quad-Core Intel(R) Xeon(R) Processor 3100 Series Dual-Core Intel(R) Xeon(R) Processor 3000 Series Intel(R) Core(TM) 2 Quad Desktop processors Intel(R) Core(TM) 2 Duo Desktop processors Intel(R) Core(TM) 2 Extreme processors Microcode update versions: CPUID Microcode 06F2h 5Ah 06F6h CBh 06F7h 68h 06FBh B6h 06FDh A3h 10661h 38h 10671h 106h 10674h 404h 10676h 60Bh 10677h 703h Intel (R) Matrix Storage OpROM: v7.5.0.1017 LSI OpRom: version 10101641 SATA AHCI BIOS: Release Date 01-05-2007 NIC : Intel (R) Boot Agent GE v1.2.60 VGA: VBE BIOS V3.8SL Memory Reference Code 1.00 REVISION INFORMATION RETURNED BY GET DEVICE ID COMMAND: Operational mode: v00.29 UBoot mode: v01.09 Device ID: 0x21 (Integrated BMC 2K7 Firmware) Manufacturer ID: 0x000157 (Intel Corporation) Product ID: 0x003A (S3210SH) Checksum information: UBoot hex Region: 0x0000000 - 0x0040000 0x0000000 - 0x0400000 MD5: 0x2b055709d138fd9a2c02ee6593c8b091 0x88db6f644c5f32b4aff11e48bfaf0a68 Changes: BIOS: Added: SLP2.0 support Added Multithreads entry into the MPS table MicroCode update for C1 Stepping processors Optimization for MCH VREF,RCOMP,GTLREF Set the ICH_RCRB_HPTC_AE bit to enable the ACPI HPET table. Fixed: BIOS always display HSC version as 0.00 Show kernel panic message when install RHEL5U1. Integrated BMC 29: Added: Support for Hot Swap Backplane (HSBP) Fixed: Post LEDs keep on after POST finished SOL data corruption occurs at 9600, 19200, 38400 baud rate FRUSDR:Added: HSC-related sensor data records Message when detecting HSC for notification of possible long delay Fixed: Removed possible long delay when checking for HSC FRUSDR.EFI's PROBE "PING" command does not work with HSC Add HSBP support LEGAL INFORMATION ============================================================================= Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel's Terms and Conditions of Sale for such products, Intel assumes no liability whatsoever, and Intel disclaims any express or implied warranty, relating to sale and/or use of Intel products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. Intel Corporation may have patents or pending patent applications, trademarks, copyrights, or other intellectual property rights that relate to the presented subject matter. The furnishing of documents and other materials and information does not provide any license, express or implied, by estoppel or otherwise, to any such patents, trademarks, copyrights, or other intellectual property rights. Intel products are not intended for use in medical, life saving, or life sustaining applications. Intel may make changes to specifications and product descriptions at any time, without notice. Intel is a registered trademark of Intel Corporation. *Other names and brands are the property of their respective owners. Copyright (c) 2007 Intel Corporation. A portion of this firmware is open source code, which falls under the GPL 2.0 license.