5 #ifndef __FLASH_LAYOUT_H__
6 #define __FLASH_LAYOUT_H__
16 QM_RW uint16_t osc_trim_16mhz;
17 QM_RW uint16_t osc_trim_32mhz;
18 QM_RW uint16_t osc_trim_4mhz;
19 QM_RW uint16_t osc_trim_8mhz;
20 } qm_flash_otp_trim_t;
23 extern uint8_t test_flash_page[0x800];
24 #define QM_FLASH_OTP_TRIM_CODE_BASE (&test_flash_page[0])
26 #define QM_FLASH_OTP_TRIM_CODE_BASE (0x4)
29 #define QM_FLASH_OTP_TRIM_CODE \
30 ((qm_flash_otp_trim_t *)QM_FLASH_OTP_TRIM_CODE_BASE)
31 #define QM_FLASH_OTP_SOC_DATA_VALID (0x24535021)
32 #define QM_FLASH_OTP_TRIM_MAGIC (QM_FLASH_OTP_SOC_DATA_VALID)
40 QM_RW uint16_t osc_trim_8mhz;
41 QM_RW uint16_t osc_trim_4mhz;
43 QM_RW uint32_t osc_trim_u32[2];
44 QM_RW uint16_t osc_trim_u16[4];
45 } qm_flash_data_trim_t;
48 #define QM_FLASH_DATA_TRIM_BASE (&test_flash_page[100])
49 #define QM_FLASH_DATA_TRIM_OFFSET (100)
51 #define QM_FLASH_DATA_TRIM_BASE (QM_FLASH_REGION_DATA_0_BASE)
52 #define QM_FLASH_DATA_TRIM_OFFSET ((uint32_t)QM_FLASH_DATA_TRIM_BASE & 0x3FFFF)
55 #define QM_FLASH_DATA_TRIM ((qm_flash_data_trim_t *)QM_FLASH_DATA_TRIM_BASE)
56 #define QM_FLASH_DATA_TRIM_CODE (&QM_FLASH_DATA_TRIM->fields)
57 #define QM_FLASH_DATA_TRIM_REGION QM_FLASH_REGION_DATA
59 #define QM_FLASH_TRIM_PRESENT_MASK (0xFC00)
60 #define QM_FLASH_TRIM_PRESENT (0x7C00)
67 #define BL_DATA_FLASH_REGION_BASE QM_FLASH_REGION_DATA_0_BASE
69 #define BL_DATA_SECTION_BASE_PAGE (0)
72 #define QM_FLASH_REGION_SYS_0_PAGES (16)