Intel® Quark™ Microcontroller Software Interface  1.4.0
Intel® Quark™ Microcontroller BSP
SS I2C

I2C driver for Sensor Subsystem. More...

Data Structures

struct  qm_ss_i2c_config_t
 QM SS I2C configuration type. More...
 
struct  qm_ss_i2c_transfer_t
 QM SS I2C transfer type. More...
 

Enumerations

enum  qm_ss_i2c_addr_t { QM_SS_I2C_7_BIT = 0, QM_SS_I2C_10_BIT }
 QM SS I2C addressing type. More...
 
enum  qm_ss_i2c_speed_t { QM_SS_I2C_SPEED_STD = 1, QM_SS_I2C_SPEED_FAST = 2, QM_SS_I2C_SPEED_FAST_PLUS }
 QM SS I2C speed type. More...
 
enum  qm_ss_i2c_status_t {
  QM_SS_I2C_IDLE = 0, QM_SS_I2C_TX_ABRT_7B_ADDR_NOACK = BIT(0), QM_SS_I2C_TX_ABRT_10ADDR1_NOACK = BIT(1), QM_SS_I2C_TX_ABRT_10ADDR2_NOACK = BIT(2),
  QM_SS_I2C_TX_ABRT_TXDATA_NOACK = BIT(3), QM_SS_I2C_TX_ABRT_GCALL_NOACK = BIT(4) , QM_SS_I2C_TX_ABRT_SBYTE_ACKDET = BIT(7), QM_SS_I2C_TX_ABRT_NORSTRT = BIT(9),
  QM_SS_I2C_TX_ABRT_10B_RD_NORSTRT = BIT(10), QM_SS_I2C_TX_ABRT_MASTER_DIS = BIT(11), QM_SS_I2C_TX_ARB_LOST = BIT(12) , QM_SS_I2C_TX_ABRT_SLV_ARBLOST = BIT(14),
  QM_SS_I2C_TX_ABRT_SLVRD_INTX = BIT(15), QM_SS_I2C_TX_ABRT_USER_ABRT = BIT(16), QM_SS_I2C_BUSY = BIT(17), QM_SS_I2C_TX_ABORT = BIT(18),
  QM_SS_I2C_TX_OVER = BIT(19), QM_SS_I2C_RX_OVER = BIT(20), QM_SS_I2C_RX_UNDER = BIT(21)
}
 QM SS I2C status type. More...
 

Functions

int qm_ss_i2c_set_config (const qm_ss_i2c_t i2c, const qm_ss_i2c_config_t *const cfg)
 Set SS I2C configuration. More...
 
int qm_ss_i2c_set_speed (const qm_ss_i2c_t i2c, const qm_ss_i2c_speed_t speed, const uint16_t lo_cnt, const uint16_t hi_cnt)
 Set I2C speed. More...
 
int qm_ss_i2c_get_status (const qm_ss_i2c_t i2c, qm_ss_i2c_status_t *const status)
 Retrieve SS I2C status. More...
 
int qm_ss_i2c_master_write (const qm_ss_i2c_t i2c, const uint16_t slave_addr, const uint8_t *const data, uint32_t len, const bool stop, qm_ss_i2c_status_t *const status)
 Master write on I2C. More...
 
int qm_ss_i2c_master_read (const qm_ss_i2c_t i2c, const uint16_t slave_addr, uint8_t *const data, uint32_t len, const bool stop, qm_ss_i2c_status_t *const status)
 Master read of I2C. More...
 
int qm_ss_i2c_master_irq_transfer (const qm_ss_i2c_t i2c, const qm_ss_i2c_transfer_t *const xfer, const uint16_t slave_addr)
 Interrupt based master transfer on I2C. More...
 
int qm_ss_i2c_irq_transfer_terminate (const qm_ss_i2c_t i2c)
 Terminate I2C IRQ/DMA transfer. More...
 
int qm_ss_i2c_save_context (const qm_ss_i2c_t i2c, qm_ss_i2c_context_t *const ctx)
 Save SS I2C context. More...
 
int qm_ss_i2c_restore_context (const qm_ss_i2c_t i2c, const qm_ss_i2c_context_t *const ctx)
 Restore SS I2C context. More...
 

Detailed Description

I2C driver for Sensor Subsystem.

Enumeration Type Documentation

QM SS I2C addressing type.

Enumerator
QM_SS_I2C_7_BIT 

7-bit mode.

QM_SS_I2C_10_BIT 

10-bit mode.

Definition at line 37 of file qm_ss_i2c.h.

QM SS I2C speed type.

Enumerator
QM_SS_I2C_SPEED_STD 

Standard mode (100 Kbps).

QM_SS_I2C_SPEED_FAST 

Fast mode (400 Kbps).

QM_SS_I2C_SPEED_FAST_PLUS 

Fast plus mode (1 Mbps).

Definition at line 45 of file qm_ss_i2c.h.

QM SS I2C status type.

Enumerator
QM_SS_I2C_IDLE 

Controller idle.

QM_SS_I2C_TX_ABRT_7B_ADDR_NOACK 

7-bit address noack.

QM_SS_I2C_TX_ABRT_10ADDR1_NOACK 

10-bit address noack.

QM_SS_I2C_TX_ABRT_10ADDR2_NOACK 

10-bit address noack.

QM_SS_I2C_TX_ABRT_TXDATA_NOACK 

Tx data noack.

QM_SS_I2C_TX_ABRT_GCALL_NOACK 

General call noack.

General call configured as read.

QM_SS_I2C_TX_ABRT_SBYTE_ACKDET 

Start ACK.

QM_SS_I2C_TX_ABRT_NORSTRT 

Restart disabled.

QM_SS_I2C_TX_ABRT_10B_RD_NORSTRT 

Restart disabled.

QM_SS_I2C_TX_ABRT_MASTER_DIS 

Master disabled.

QM_SS_I2C_TX_ARB_LOST 

Master lost arbitration.

Slave flush tx FIFO.

QM_SS_I2C_TX_ABRT_SLV_ARBLOST 

Slave lost bus.

QM_SS_I2C_TX_ABRT_SLVRD_INTX 

Slave read completion.

QM_SS_I2C_TX_ABRT_USER_ABRT 

User abort.

QM_SS_I2C_BUSY 

Controller busy.

QM_SS_I2C_TX_ABORT 

Tx abort.

QM_SS_I2C_TX_OVER 

Tx overflow.

QM_SS_I2C_RX_OVER 

Rx overflow.

QM_SS_I2C_RX_UNDER 

Rx underflow.

Definition at line 56 of file qm_ss_i2c.h.

Function Documentation

int qm_ss_i2c_get_status ( const qm_ss_i2c_t  i2c,
qm_ss_i2c_status_t *const  status 
)

Retrieve SS I2C status.

Parameters
[in]i2cWhich I2C to read the status of.
[out]statusGet I2C status. This must not be NULL.
Returns
Standard errno return type for QMSI.
Return values
0on success.
Negativeerrno for possible error codes.

Definition at line 505 of file qm_ss_i2c.c.

References QM_SS_I2C_BUSY, and QM_SS_I2C_IDLE.

Referenced by qm_ss_i2c_master_read(), and qm_ss_i2c_master_write().

int qm_ss_i2c_irq_transfer_terminate ( const qm_ss_i2c_t  i2c)

Terminate I2C IRQ/DMA transfer.

Terminate the current IRQ transfer on the SS I2C bus. This will cause the user callback to be called with status QM_SS_I2C_TX_ABRT_USER_ABRT.

Parameters
[in]i2cI2C register block pointer.
Returns
Standard errno return type for QMSI.
Return values
0on success.
Negativeerrno for possible error codes.

Definition at line 761 of file qm_ss_i2c.c.

int qm_ss_i2c_master_irq_transfer ( const qm_ss_i2c_t  i2c,
const qm_ss_i2c_transfer_t *const  xfer,
const uint16_t  slave_addr 
)

Interrupt based master transfer on I2C.

Perform an interrupt based master transfer on the SS I2C bus. The function will replenish/empty TX/RX FIFOs on I2C empty/full interrupts.

Parameters
[in]i2cWhich I2C to transfer from.
[in]xferTransfer structure includes write / read data and length, user callback function and the callback context. The structure must not be NULL and must be kept valid until the transfer is complete.
[in]slave_addrAddress of slave to transfer data with.
Returns
Standard errno return type for QMSI.
Return values
0on success.
Negativeerrno for possible error codes.

Definition at line 675 of file qm_ss_i2c.c.

References qm_ss_i2c_transfer_t::rx_len.

int qm_ss_i2c_master_read ( const qm_ss_i2c_t  i2c,
const uint16_t  slave_addr,
uint8_t *const  data,
uint32_t  len,
const bool  stop,
qm_ss_i2c_status_t *const  status 
)

Master read of I2C.

Perform a single byte master read from the SS I2C. This is a blocking call.

Parameters
[in]i2cWhich I2C to read from.
[in]slave_addrAddress of slave device to read from.
[out]dataPre-allocated buffer to populate with data. This must not be NULL.
[in]lenLength of data to read from slave.
[in]stopGenerate a STOP condition at the end of rx.
[out]statusGet I2C status.
Returns
Standard errno return type for QMSI.
Return values
0on success.
Negativeerrno for possible error codes.

Definition at line 598 of file qm_ss_i2c.c.

References qm_ss_i2c_get_status().

int qm_ss_i2c_master_write ( const qm_ss_i2c_t  i2c,
const uint16_t  slave_addr,
const uint8_t *const  data,
uint32_t  len,
const bool  stop,
qm_ss_i2c_status_t *const  status 
)

Master write on I2C.

Perform a master write on the SS I2C bus. This is a blocking synchronous call.

Parameters
[in]i2cWhich I2C to write to.
[in]slave_addrAddress of slave to write to.
[in]dataPre-allocated buffer of data to write. This must not be NULL.
[in]lenLength of data to write.
[in]stopGenerate a STOP condition at the end of tx.
[out]statusGet I2C status.
Returns
Standard errno return type for QMSI.
Return values
0on success.
Negativeerrno for possible error codes.

Definition at line 526 of file qm_ss_i2c.c.

References qm_ss_i2c_get_status().

int qm_ss_i2c_restore_context ( const qm_ss_i2c_t  i2c,
const qm_ss_i2c_context_t *const  ctx 
)

Restore SS I2C context.

Restore the configuration of the specified SS I2C peripheral after exiting sleep.

Parameters
[in]i2cI2C port index.
[in]ctxI2C context structure. This must not be NULL.
Returns
Standard errno return type for QMSI.
Return values
0on success.
Negativeerrno for possible error codes.

Definition at line 799 of file qm_ss_i2c.c.

int qm_ss_i2c_save_context ( const qm_ss_i2c_t  i2c,
qm_ss_i2c_context_t *const  ctx 
)

Save SS I2C context.

Saves the configuration of the specified SS I2C peripheral before entering sleep. The slave operations need to be disabled before being able to save the context as otherwise we could be interrupted by an I2C transfer while saving registers.

Parameters
[in]i2cI2C port index.
[out]ctxI2C context structure. This must not be NULL.
Returns
Standard errno return type for QMSI.
Return values
0on success.
Negativeerrno for possible error codes.

Definition at line 782 of file qm_ss_i2c.c.

int qm_ss_i2c_set_config ( const qm_ss_i2c_t  i2c,
const qm_ss_i2c_config_t *const  cfg 
)

Set SS I2C configuration.

Parameters
[in]i2cWhich I2C to set the configuration of.
[in]cfgI2C configuration. This must not be NULL.
Returns
Standard errno return type for QMSI.
Return values
0on success.
Negativeerrno for possible error codes.

Definition at line 347 of file qm_ss_i2c.c.

References qm_ss_i2c_config_t::address_mode, QM_SS_I2C_SPEED_FAST, QM_SS_I2C_SPEED_FAST_PLUS, QM_SS_I2C_SPEED_STD, and qm_ss_i2c_config_t::speed.

int qm_ss_i2c_set_speed ( const qm_ss_i2c_t  i2c,
const qm_ss_i2c_speed_t  speed,
const uint16_t  lo_cnt,
const uint16_t  hi_cnt 
)

Set I2C speed.

Fine tune SS I2C clock speed. This will set the SCL low count and the SCL hi count cycles to achieve any required speed.

Parameters
[in]i2cI2C index.
[in]speedBus speed (Standard or Fast. Fast includes Fast+ mode).
[in]lo_cntSCL low count.
[in]hi_cntSCL high count.
Returns
Standard errno return type for QMSI.
Return values
0on success.
Negativeerrno for possible error codes.

Definition at line 450 of file qm_ss_i2c.c.

References QM_SS_I2C_SPEED_FAST, QM_SS_I2C_SPEED_FAST_PLUS, and QM_SS_I2C_SPEED_STD.