Intel® Quark™ Microcontroller Software Interface  1.4.0
Intel® Quark™ Microcontroller BSP
qm_pinmux.h
1 /*
2  * {% copyright %}
3  */
4 
5 #ifndef __QM_PINMUX_H__
6 #define __QM_PINMUX_H__
7 
8 #include "qm_common.h"
9 #include "qm_soc_regs.h"
10 
11 /**
12  * Pin muxing configuration.
13  *
14  * @defgroup groupPinMux Pin Muxing setup
15  * @{
16  */
17 
18 /**
19  * Pin function type.
20  */
21 typedef enum {
22  QM_PMUX_FN_0, /**< Gpio function 0. */
23  QM_PMUX_FN_1, /**< Gpio function 0. */
24  QM_PMUX_FN_2, /**< Gpio function 0. */
25  QM_PMUX_FN_3, /**< Gpio function 0. */
26 } qm_pmux_fn_t;
27 
28 /**
29  * Pin slew rate setting.
30  */
31 typedef enum {
32 #if (QUARK_SE)
33  QM_PMUX_SLEW_2MA, /**< Set gpio slew rate to 2MA. */
34  QM_PMUX_SLEW_4MA, /**< Set gpio slew rate to 4MA. */
35 #else
36  QM_PMUX_SLEW_12MA, /**< Set gpio slew rate to 12MA. */
37  QM_PMUX_SLEW_16MA, /**< Set gpio slew rate to 16MA. */
38 #endif
39  QM_PMUX_SLEW_NUM /**< Max number of slew rate options. */
41 
42 /**
43  * External Pad pin identifiers
44  **/
45 typedef enum {
46  QM_PIN_ID_0, /**< Pin id 0. */
47  QM_PIN_ID_1, /**< Pin id 1. */
48  QM_PIN_ID_2, /**< Pin id 2. */
49  QM_PIN_ID_3, /**< Pin id 3. */
50  QM_PIN_ID_4, /**< Pin id 4. */
51  QM_PIN_ID_5, /**< Pin id 5. */
52  QM_PIN_ID_6, /**< Pin id 6. */
53  QM_PIN_ID_7, /**< Pin id 7. */
54  QM_PIN_ID_8, /**< Pin id 8. */
55  QM_PIN_ID_9, /**< Pin id 9. */
56  QM_PIN_ID_10, /**< Pin id 10. */
57  QM_PIN_ID_11, /**< Pin id 11. */
58  QM_PIN_ID_12, /**< Pin id 12. */
59  QM_PIN_ID_13, /**< Pin id 13. */
60  QM_PIN_ID_14, /**< Pin id 14. */
61  QM_PIN_ID_15, /**< Pin id 15. */
62  QM_PIN_ID_16, /**< Pin id 16. */
63  QM_PIN_ID_17, /**< Pin id 17. */
64  QM_PIN_ID_18, /**< Pin id 18. */
65  QM_PIN_ID_19, /**< Pin id 19. */
66  QM_PIN_ID_20, /**< Pin id 20. */
67  QM_PIN_ID_21, /**< Pin id 21. */
68  QM_PIN_ID_22, /**< Pin id 22. */
69  QM_PIN_ID_23, /**< Pin id 23. */
70  QM_PIN_ID_24, /**< Pin id 24. */
71 #if (QUARK_SE)
72  QM_PIN_ID_25, /**< Pin id 25. */
73  QM_PIN_ID_26, /**< Pin id 26. */
74  QM_PIN_ID_27, /**< Pin id 27. */
75  QM_PIN_ID_28, /**< Pin id 28. */
76  QM_PIN_ID_29, /**< Pin id 29. */
77  QM_PIN_ID_30, /**< Pin id 30. */
78  QM_PIN_ID_31, /**< Pin id 31. */
79  QM_PIN_ID_32, /**< Pin id 32. */
80  QM_PIN_ID_33, /**< Pin id 33. */
81  QM_PIN_ID_34, /**< Pin id 34. */
82  QM_PIN_ID_35, /**< Pin id 35. */
83  QM_PIN_ID_36, /**< Pin id 36. */
84  QM_PIN_ID_37, /**< Pin id 37. */
85  QM_PIN_ID_38, /**< Pin id 38. */
86  QM_PIN_ID_39, /**< Pin id 39. */
87  QM_PIN_ID_40, /**< Pin id 40. */
88  QM_PIN_ID_41, /**< Pin id 41. */
89  QM_PIN_ID_42, /**< Pin id 42. */
90  QM_PIN_ID_43, /**< Pin id 43. */
91  QM_PIN_ID_44, /**< Pin id 44. */
92  QM_PIN_ID_45, /**< Pin id 45. */
93  QM_PIN_ID_46, /**< Pin id 46. */
94  QM_PIN_ID_47, /**< Pin id 47. */
95  QM_PIN_ID_48, /**< Pin id 48. */
96  QM_PIN_ID_49, /**< Pin id 49. */
97  QM_PIN_ID_50, /**< Pin id 50. */
98  QM_PIN_ID_51, /**< Pin id 51. */
99  QM_PIN_ID_52, /**< Pin id 52. */
100  QM_PIN_ID_53, /**< Pin id 53. */
101  QM_PIN_ID_54, /**< Pin id 54. */
102  QM_PIN_ID_55, /**< Pin id 55. */
103  QM_PIN_ID_56, /**< Pin id 56. */
104  QM_PIN_ID_57, /**< Pin id 57. */
105  QM_PIN_ID_58, /**< Pin id 58. */
106  QM_PIN_ID_59, /**< Pin id 59. */
107  QM_PIN_ID_60, /**< Pin id 60. */
108  QM_PIN_ID_61, /**< Pin id 61. */
109  QM_PIN_ID_62, /**< Pin id 62. */
110  QM_PIN_ID_63, /**< Pin id 63. */
111  QM_PIN_ID_64, /**< Pin id 64. */
112  QM_PIN_ID_65, /**< Pin id 65. */
113  QM_PIN_ID_66, /**< Pin id 66. */
114  QM_PIN_ID_67, /**< Pin id 67. */
115  QM_PIN_ID_68, /**< Pin id 68. */
116 #endif
117  QM_PIN_ID_NUM
118 } qm_pin_id_t;
119 
120 /**
121  * Set up pin muxing for a SoC pin. Select one of the pin functions.
122  *
123  * @param[in] pin which pin to configure.
124  * @param[in] fn the function to assign to the pin.
125  *
126  * @return Standard errno return type for QMSI.
127  * @retval 0 on success.
128  * @retval Negative @ref errno for possible error codes.
129  * */
130 int qm_pmux_select(const qm_pin_id_t pin, const qm_pmux_fn_t fn);
131 
132 /**
133  * Set up pin's slew rate in the pin mux controller.
134  *
135  * @param[in] pin which pin to configure.
136  * @param[in] slew the slew rate to assign to the pin.
137  *
138  * @return Standard errno return type for QMSI.
139  * @retval 0 on success.
140  * @retval Negative @ref errno for possible error codes.
141  */
142 int qm_pmux_set_slew(const qm_pin_id_t pin, const qm_pmux_slew_t slew);
143 
144 /**
145  * Enable input for a pin in the pin mux controller.
146  *
147  * @param[in] pin which pin to configure.
148  * @param[in] enable set to true to enable input.
149  *
150  * @return Standard errno return type for QMSI.
151  * @retval 0 on success.
152  * @retval Negative @ref errno for possible error codes.
153  */
154 int qm_pmux_input_en(const qm_pin_id_t pin, const bool enable);
155 
156 /**
157  * Enable pullup for a pin in the pin mux controller.
158  *
159  * @param[in] pin which pin to configure.
160  * @param[in] enable set to true to enable pullup.
161  *
162  * @return Standard errno return type for QMSI.
163  * @retval 0 on success.
164  * @retval Negative @ref errno for possible error codes.
165  */
166 int qm_pmux_pullup_en(const qm_pin_id_t pin, const bool enable);
167 
168 /**
169  * @}
170  */
171 
172 #endif /* __QM_PINMUX_H__ */
Pin id 55.
Definition: qm_pinmux.h:102
Pin id 45.
Definition: qm_pinmux.h:92
Pin id 1.
Definition: qm_pinmux.h:47
Pin id 4.
Definition: qm_pinmux.h:50
Pin id 60.
Definition: qm_pinmux.h:107
Pin id 13.
Definition: qm_pinmux.h:59
qm_pin_id_t
External Pad pin identifiers.
Definition: qm_pinmux.h:45
Pin id 57.
Definition: qm_pinmux.h:104
Pin id 6.
Definition: qm_pinmux.h:52
Pin id 33.
Definition: qm_pinmux.h:80
Pin id 32.
Definition: qm_pinmux.h:79
Pin id 20.
Definition: qm_pinmux.h:66
Pin id 67.
Definition: qm_pinmux.h:114
Pin id 49.
Definition: qm_pinmux.h:96
Set gpio slew rate to 2MA.
Definition: qm_pinmux.h:33
Pin id 51.
Definition: qm_pinmux.h:98
Pin id 59.
Definition: qm_pinmux.h:106
Pin id 26.
Definition: qm_pinmux.h:73
Gpio function 0.
Definition: qm_pinmux.h:23
Pin id 24.
Definition: qm_pinmux.h:70
Pin id 42.
Definition: qm_pinmux.h:89
Pin id 0.
Definition: qm_pinmux.h:46
Pin id 27.
Definition: qm_pinmux.h:74
Pin id 18.
Definition: qm_pinmux.h:64
Max number of slew rate options.
Definition: qm_pinmux.h:39
Pin id 61.
Definition: qm_pinmux.h:108
Set gpio slew rate to 16MA.
Definition: qm_pinmux.h:37
Pin id 29.
Definition: qm_pinmux.h:76
Pin id 9.
Definition: qm_pinmux.h:55
int qm_pmux_input_en(const qm_pin_id_t pin, const bool enable)
Enable input for a pin in the pin mux controller.
Definition: qm_pinmux.c:67
Pin id 65.
Definition: qm_pinmux.h:112
Pin id 53.
Definition: qm_pinmux.h:100
Pin id 64.
Definition: qm_pinmux.h:111
Pin id 3.
Definition: qm_pinmux.h:49
Pin id 31.
Definition: qm_pinmux.h:78
Pin id 43.
Definition: qm_pinmux.h:90
Gpio function 0.
Definition: qm_pinmux.h:22
Pin id 12.
Definition: qm_pinmux.h:58
qm_pmux_slew_t
Pin slew rate setting.
Definition: qm_pinmux.h:31
Pin id 14.
Definition: qm_pinmux.h:60
Pin id 16.
Definition: qm_pinmux.h:62
Pin id 48.
Definition: qm_pinmux.h:95
Pin id 58.
Definition: qm_pinmux.h:105
Gpio function 0.
Definition: qm_pinmux.h:24
Pin id 7.
Definition: qm_pinmux.h:53
Pin id 21.
Definition: qm_pinmux.h:67
Gpio function 0.
Definition: qm_pinmux.h:25
Pin id 50.
Definition: qm_pinmux.h:97
Pin id 44.
Definition: qm_pinmux.h:91
Pin id 38.
Definition: qm_pinmux.h:85
Pin id 35.
Definition: qm_pinmux.h:82
Pin id 17.
Definition: qm_pinmux.h:63
int qm_pmux_select(const qm_pin_id_t pin, const qm_pmux_fn_t fn)
Set up pin muxing for a SoC pin.
Definition: qm_pinmux.c:37
Pin id 52.
Definition: qm_pinmux.h:99
Pin id 39.
Definition: qm_pinmux.h:86
Pin id 36.
Definition: qm_pinmux.h:83
Pin id 46.
Definition: qm_pinmux.h:93
Pin id 54.
Definition: qm_pinmux.h:101
Pin id 19.
Definition: qm_pinmux.h:65
Pin id 40.
Definition: qm_pinmux.h:87
Pin id 8.
Definition: qm_pinmux.h:54
Pin id 25.
Definition: qm_pinmux.h:72
Pin id 41.
Definition: qm_pinmux.h:88
Pin id 34.
Definition: qm_pinmux.h:81
Pin id 23.
Definition: qm_pinmux.h:69
Pin id 11.
Definition: qm_pinmux.h:57
Pin id 22.
Definition: qm_pinmux.h:68
Pin id 2.
Definition: qm_pinmux.h:48
Set gpio slew rate to 4MA.
Definition: qm_pinmux.h:34
int qm_pmux_set_slew(const qm_pin_id_t pin, const qm_pmux_slew_t slew)
Set up pin's slew rate in the pin mux controller.
Definition: qm_pinmux.c:51
Pin id 30.
Definition: qm_pinmux.h:77
int qm_pmux_pullup_en(const qm_pin_id_t pin, const bool enable)
Enable pullup for a pin in the pin mux controller.
Definition: qm_pinmux.c:82
Pin id 10.
Definition: qm_pinmux.h:56
Pin id 28.
Definition: qm_pinmux.h:75
Pin id 15.
Definition: qm_pinmux.h:61
Pin id 68.
Definition: qm_pinmux.h:115
Set gpio slew rate to 12MA.
Definition: qm_pinmux.h:36
Pin id 63.
Definition: qm_pinmux.h:110
Pin id 66.
Definition: qm_pinmux.h:113
Pin id 47.
Definition: qm_pinmux.h:94
Pin id 5.
Definition: qm_pinmux.h:51
Pin id 62.
Definition: qm_pinmux.h:109
Pin id 37.
Definition: qm_pinmux.h:84
Pin id 56.
Definition: qm_pinmux.h:103
qm_pmux_fn_t
Pin function type.
Definition: qm_pinmux.h:21