Intel® Quark™ Microcontroller Software Interface
1.4.0
Intel® Quark™ Microcontroller BSP
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SPI register map. More...
#include <qm_soc_regs.h>
Data Fields | |
QM_RW uint32_t | ctrlr0 |
Control Register 0. More... | |
QM_RW uint32_t | ctrlr1 |
Control Register 1. More... | |
QM_RW uint32_t | ssienr |
SSI Enable Register. More... | |
QM_RW uint32_t | mwcr |
Microwire Control Register. More... | |
QM_RW uint32_t | ser |
Slave Enable Register. More... | |
QM_RW uint32_t | baudr |
Baud Rate Select. More... | |
QM_RW uint32_t | txftlr |
Transmit FIFO Threshold Level. More... | |
QM_RW uint32_t | rxftlr |
Receive FIFO Threshold Level. More... | |
QM_RW uint32_t | txflr |
Transmit FIFO Level Register. More... | |
QM_RW uint32_t | rxflr |
Receive FIFO Level Register. More... | |
QM_RW uint32_t | sr |
Status Register. More... | |
QM_RW uint32_t | imr |
Interrupt Mask Register. More... | |
QM_RW uint32_t | isr |
Interrupt Status Register. More... | |
QM_RW uint32_t | risr |
Raw Interrupt Status Register. More... | |
QM_RW uint32_t | txoicr |
Tx FIFO Overflow Interrupt Clear Register. More... | |
QM_RW uint32_t | rxoicr |
Rx FIFO Overflow Interrupt Clear Register. More... | |
QM_RW uint32_t | rxuicr |
Rx FIFO Underflow Interrupt Clear Register. More... | |
QM_RW uint32_t | msticr |
Multi-Master Interrupt Clear Register. More... | |
QM_RW uint32_t | icr |
Interrupt Clear Register. More... | |
QM_RW uint32_t | dmacr |
DMA Control Register. More... | |
QM_RW uint32_t | dmatdlr |
DMA Transmit Data Level. More... | |
QM_RW uint32_t | dmardlr |
DMA Receive Data Level. More... | |
QM_RW uint32_t | idr |
Identification Register. More... | |
QM_RW uint32_t | ssi_comp_version |
coreKit Version ID register. More... | |
QM_RW uint32_t | dr [36] |
Data Register. More... | |
QM_RW uint32_t | rx_sample_dly |
RX Sample Delay Register. More... | |
SPI register map.
Definition at line 712 of file qm_soc_regs.h.
QM_RW uint32_t qm_spi_reg_t::baudr |
Baud Rate Select.
Definition at line 718 of file qm_soc_regs.h.
Referenced by qm_spi_restore_context(), qm_spi_save_context(), and qm_spi_set_config().
QM_RW uint32_t qm_spi_reg_t::ctrlr0 |
Control Register 0.
Definition at line 713 of file qm_soc_regs.h.
Referenced by qm_spi_irq_transfer(), qm_spi_restore_context(), qm_spi_save_context(), and qm_spi_set_config().
QM_RW uint32_t qm_spi_reg_t::ctrlr1 |
Control Register 1.
Definition at line 714 of file qm_soc_regs.h.
Referenced by qm_spi_dma_transfer(), qm_spi_irq_transfer(), and qm_spi_transfer().
QM_RW uint32_t qm_spi_reg_t::dmacr |
DMA Control Register.
Definition at line 735 of file qm_soc_regs.h.
Referenced by qm_spi_dma_transfer().
QM_RW uint32_t qm_spi_reg_t::dmardlr |
DMA Receive Data Level.
Definition at line 737 of file qm_soc_regs.h.
Referenced by qm_spi_dma_transfer().
QM_RW uint32_t qm_spi_reg_t::dmatdlr |
DMA Transmit Data Level.
Definition at line 736 of file qm_soc_regs.h.
Referenced by qm_spi_dma_transfer().
QM_RW uint32_t qm_spi_reg_t::dr |
QM_RW uint32_t qm_spi_reg_t::icr |
Interrupt Clear Register.
Definition at line 734 of file qm_soc_regs.h.
QM_RW uint32_t qm_spi_reg_t::idr |
Identification Register.
Definition at line 738 of file qm_soc_regs.h.
QM_RW uint32_t qm_spi_reg_t::imr |
Interrupt Mask Register.
Definition at line 724 of file qm_soc_regs.h.
Referenced by qm_spi_dma_transfer(), qm_spi_irq_transfer_terminate(), qm_spi_irq_update(), and qm_spi_transfer().
QM_RW uint32_t qm_spi_reg_t::isr |
Interrupt Status Register.
Definition at line 725 of file qm_soc_regs.h.
QM_RW uint32_t qm_spi_reg_t::msticr |
Multi-Master Interrupt Clear Register.
Definition at line 733 of file qm_soc_regs.h.
QM_RW uint32_t qm_spi_reg_t::mwcr |
Microwire Control Register.
Definition at line 716 of file qm_soc_regs.h.
QM_RW uint32_t qm_spi_reg_t::risr |
Raw Interrupt Status Register.
Definition at line 726 of file qm_soc_regs.h.
Referenced by qm_spi_get_status(), and qm_spi_transfer().
QM_RW uint32_t qm_spi_reg_t::rx_sample_dly |
RX Sample Delay Register.
Definition at line 741 of file qm_soc_regs.h.
QM_RW uint32_t qm_spi_reg_t::rxflr |
Receive FIFO Level Register.
Definition at line 722 of file qm_soc_regs.h.
QM_RW uint32_t qm_spi_reg_t::rxftlr |
Receive FIFO Threshold Level.
Definition at line 720 of file qm_soc_regs.h.
Referenced by qm_spi_irq_transfer().
QM_RW uint32_t qm_spi_reg_t::rxoicr |
Rx FIFO Overflow Interrupt Clear Register.
Definition at line 730 of file qm_soc_regs.h.
Referenced by qm_spi_transfer().
QM_RW uint32_t qm_spi_reg_t::rxuicr |
Rx FIFO Underflow Interrupt Clear Register.
Definition at line 732 of file qm_soc_regs.h.
QM_RW uint32_t qm_spi_reg_t::ser |
Slave Enable Register.
Definition at line 717 of file qm_soc_regs.h.
Referenced by qm_spi_restore_context(), and qm_spi_save_context().
QM_RW uint32_t qm_spi_reg_t::sr |
Status Register.
Definition at line 723 of file qm_soc_regs.h.
Referenced by qm_spi_get_status(), and qm_spi_transfer().
QM_RW uint32_t qm_spi_reg_t::ssi_comp_version |
coreKit Version ID register.
coreKit Version ID register
Definition at line 739 of file qm_soc_regs.h.
QM_RW uint32_t qm_spi_reg_t::ssienr |
SSI Enable Register.
Definition at line 715 of file qm_soc_regs.h.
Referenced by qm_spi_dma_transfer(), qm_spi_irq_transfer(), qm_spi_irq_transfer_terminate(), and qm_spi_transfer().
QM_RW uint32_t qm_spi_reg_t::txflr |
Transmit FIFO Level Register.
Definition at line 721 of file qm_soc_regs.h.
Referenced by qm_spi_irq_transfer_terminate().
QM_RW uint32_t qm_spi_reg_t::txftlr |
Transmit FIFO Threshold Level.
Definition at line 719 of file qm_soc_regs.h.
Referenced by qm_spi_irq_transfer().
QM_RW uint32_t qm_spi_reg_t::txoicr |
Tx FIFO Overflow Interrupt Clear Register.
Definition at line 728 of file qm_soc_regs.h.