Intel® Quark™ Microcontroller Software Interface
1.4.0
Intel® Quark™ Microcontroller BSP
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UART register map. More...
#include <qm_soc_regs.h>
Data Fields | |
QM_RW uint32_t | rbr_thr_dll |
Rx Buffer/ Tx Holding/ Div Latch Low. More... | |
QM_RW uint32_t | ier_dlh |
Interrupt Enable / Divisor Latch High. More... | |
QM_RW uint32_t | iir_fcr |
Interrupt Identification / FIFO Control. More... | |
QM_RW uint32_t | lcr |
Line Control. More... | |
QM_RW uint32_t | mcr |
MODEM Control. More... | |
QM_RW uint32_t | lsr |
Line Status. More... | |
QM_RW uint32_t | msr |
MODEM Status. More... | |
QM_RW uint32_t | scr |
Scratchpad. More... | |
QM_RW uint32_t | usr |
UART Status. More... | |
QM_RW uint32_t | htx |
Halt Transmission. More... | |
QM_RW uint32_t | dmasa |
DMA Software Acknowledge. More... | |
QM_RW uint32_t | tcr |
Transceiver Control Register. More... | |
QM_RW uint32_t | de_en |
Driver Output Enable Register. More... | |
QM_RW uint32_t | re_en |
Receiver Output Enable Register. More... | |
QM_RW uint32_t | det |
Driver Output Enable Timing Register. More... | |
QM_RW uint32_t | tat |
TurnAround Timing Register. More... | |
QM_RW uint32_t | dlf |
Divisor Latch Fraction. More... | |
QM_RW uint32_t | rar |
Receive Address Register. More... | |
QM_RW uint32_t | tar |
Transmit Address Register. More... | |
QM_RW uint32_t | lcr_ext |
Line Extended Control Register. More... | |
UART register map.
Definition at line 658 of file qm_soc_regs.h.
QM_RW uint32_t qm_uart_reg_t::de_en |
Driver Output Enable Register.
Definition at line 674 of file qm_soc_regs.h.
QM_RW uint32_t qm_uart_reg_t::det |
Driver Output Enable Timing Register.
Definition at line 676 of file qm_soc_regs.h.
QM_RW uint32_t qm_uart_reg_t::dlf |
Divisor Latch Fraction.
Definition at line 678 of file qm_soc_regs.h.
Referenced by qm_uart_restore_context(), qm_uart_save_context(), and qm_uart_set_config().
QM_RW uint32_t qm_uart_reg_t::dmasa |
DMA Software Acknowledge.
Definition at line 672 of file qm_soc_regs.h.
QM_RW uint32_t qm_uart_reg_t::htx |
Halt Transmission.
Definition at line 671 of file qm_soc_regs.h.
Referenced by qm_uart_restore_context(), and qm_uart_save_context().
QM_RW uint32_t qm_uart_reg_t::ier_dlh |
Interrupt Enable / Divisor Latch High.
Definition at line 661 of file qm_soc_regs.h.
Referenced by qm_uart_irq_read(), qm_uart_irq_read_terminate(), qm_uart_irq_write(), qm_uart_irq_write_terminate(), qm_uart_restore_context(), qm_uart_save_context(), and qm_uart_set_config().
QM_RW uint32_t qm_uart_reg_t::iir_fcr |
Interrupt Identification / FIFO Control.
Definition at line 662 of file qm_soc_regs.h.
Referenced by qm_uart_dma_read(), qm_uart_dma_write(), qm_uart_irq_read(), qm_uart_irq_write(), qm_uart_restore_context(), and qm_uart_set_config().
QM_RW uint32_t qm_uart_reg_t::lcr |
Line Control.
Definition at line 663 of file qm_soc_regs.h.
Referenced by qm_uart_restore_context(), qm_uart_save_context(), and qm_uart_set_config().
QM_RW uint32_t qm_uart_reg_t::lcr_ext |
Line Extended Control Register.
Definition at line 681 of file qm_soc_regs.h.
QM_RW uint32_t qm_uart_reg_t::lsr |
Line Status.
Definition at line 665 of file qm_soc_regs.h.
Referenced by qm_uart_get_status(), qm_uart_read(), qm_uart_set_config(), qm_uart_write(), and qm_uart_write_buffer().
QM_RW uint32_t qm_uart_reg_t::mcr |
MODEM Control.
Definition at line 664 of file qm_soc_regs.h.
Referenced by qm_uart_restore_context(), qm_uart_save_context(), and qm_uart_set_config().
QM_RW uint32_t qm_uart_reg_t::msr |
MODEM Status.
Definition at line 666 of file qm_soc_regs.h.
QM_RW uint32_t qm_uart_reg_t::rar |
Receive Address Register.
Definition at line 679 of file qm_soc_regs.h.
QM_RW uint32_t qm_uart_reg_t::rbr_thr_dll |
Rx Buffer/ Tx Holding/ Div Latch Low.
Definition at line 660 of file qm_soc_regs.h.
Referenced by qm_uart_dma_read(), qm_uart_dma_write(), qm_uart_read(), qm_uart_read_non_block(), qm_uart_restore_context(), qm_uart_save_context(), qm_uart_set_config(), qm_uart_write(), qm_uart_write_buffer(), and qm_uart_write_non_block().
QM_RW uint32_t qm_uart_reg_t::re_en |
Receiver Output Enable Register.
Definition at line 675 of file qm_soc_regs.h.
QM_RW uint32_t qm_uart_reg_t::scr |
Scratchpad.
Definition at line 667 of file qm_soc_regs.h.
Referenced by qm_uart_get_status(), qm_uart_restore_context(), and qm_uart_save_context().
QM_RW uint32_t qm_uart_reg_t::tar |
Transmit Address Register.
Definition at line 680 of file qm_soc_regs.h.
QM_RW uint32_t qm_uart_reg_t::tat |
TurnAround Timing Register.
Definition at line 677 of file qm_soc_regs.h.
QM_RW uint32_t qm_uart_reg_t::tcr |
Transceiver Control Register.
Definition at line 673 of file qm_soc_regs.h.
QM_RW uint32_t qm_uart_reg_t::usr |
UART Status.
Definition at line 669 of file qm_soc_regs.h.