6 #include "qm_interrupt.h"
7 #include "qm_interrupt_router.h"
9 #define ADDRESS_MASK_7_BIT (0x7F)
11 static void (*callback)(
void *data);
12 static void *callback_data;
17 (*callback)(callback_data);
19 QM_MPR->mpr_vsts = QM_MPR_VSTS_VALID;
21 QM_ISR_EOI(QM_IRQ_SRAM_MPR_0_INT_VECTOR);
27 QM_CHECK(cfg != NULL, -EINVAL);
29 QM_MPR->mpr_cfg[id] &= ~QM_MPR_EN_LOCK_MASK;
35 ((cfg->
up_bound & ADDRESS_MASK_7_BIT) << QM_MPR_UP_BOUND_OFFSET)
41 QM_MPR->mpr_cfg[id] |= (cfg->
en_lock_mask << QM_MPR_EN_LOCK_OFFSET);
46 qm_mpr_callback_t callback_fn,
void *cb_data)
48 QM_CHECK(mode <= MPR_VIOL_MODE_PROBE, -EINVAL);
50 if (MPR_VIOL_MODE_INTERRUPT == mode) {
51 callback = callback_fn;
52 callback_data = cb_data;
55 QM_IR_UNMASK_INTERRUPTS(
56 QM_INTERRUPT_ROUTER->sram_mpr_0_int_mask);
58 QM_IR_MASK_HALTS(QM_INTERRUPT_ROUTER->sram_mpr_0_int_mask);
60 QM_SCSS_SS->ss_cfg &= ~QM_SS_STS_HALT_INTERRUPT_REDIRECTION;
66 QM_IR_MASK_INTERRUPTS(QM_INTERRUPT_ROUTER->sram_mpr_0_int_mask);
68 QM_IR_UNMASK_HALTS(QM_INTERRUPT_ROUTER->sram_mpr_0_int_mask);
70 if (MPR_VIOL_MODE_PROBE == mode) {
80 QM_SS_STS_HALT_INTERRUPT_REDIRECTION;
83 ~QM_SS_STS_HALT_INTERRUPT_REDIRECTION;
90 qm_mpr_callback_t callback_fn,
void *cb_data)
92 QM_CHECK(mode <= MPR_VIOL_MODE_PROBE, -EINVAL);
94 if (MPR_VIOL_MODE_INTERRUPT == mode) {
95 callback = callback_fn;
96 callback_data = cb_data;
99 QM_IR_UNMASK_INT(QM_IRQ_SRAM_MPR_0_INT);
101 QM_IR_MASK_HALTS(QM_INTERRUPT_ROUTER->sram_mpr_0_int_mask);
107 QM_IR_MASK_INT(QM_IRQ_SRAM_MPR_0_INT);
109 QM_IR_UNMASK_HALTS(QM_INTERRUPT_ROUTER->sram_mpr_0_int_mask);
111 if (MPR_VIOL_MODE_PROBE == mode) {
120 QM_SCSS_PMU->p_sts |=
121 QM_P_STS_HALT_INTERRUPT_REDIRECTION;
123 QM_SCSS_PMU->p_sts &=
124 ~QM_P_STS_HALT_INTERRUPT_REDIRECTION;
131 #if (ENABLE_RESTORE_CONTEXT)
134 QM_CHECK(ctx != NULL, -EINVAL);
148 QM_CHECK(ctx != NULL, -EINVAL);
int qm_mpr_set_violation_policy(const qm_mpr_viol_mode_t mode, qm_mpr_callback_t callback_fn, void *cb_data)
Configure MPR violation behaviour.
int qm_mpr_set_config(const qm_mpr_id_t id, const qm_mpr_config_t *const cfg)
Configure SRAM controller's Memory Protection Region.
QM_RW uint32_t mpr_cfg[4]
MPR CFG.
Number of Memory Protection Regions.
uint8_t en_lock_mask
Enable/lock bitmask.
int qm_mpr_restore_context(const qm_mpr_context_t *const ctx)
Restore MPR context.
QM_ISR_DECLARE(qm_sram_mpr_0_isr)
ISR for Memory Protection Region interrupt.
uint8_t low_bound
1KB-aligned lower addr
uint8_t up_bound
1KB-aligned upper addr
int qm_mpr_save_context(qm_mpr_context_t *const ctx)
Save MPR context.
uint8_t agent_write_en_mask
Per-agent write enable bitmask.
Memory Protection Region register map.
SRAM Memory Protection Region configuration type.
uint32_t mpr_cfg[QM_MPR_NUM]
MPR Configuration Register.
uint8_t agent_read_en_mask
Per-agent read enable bitmask.