7 typedef enum { AON_VR = 0, PLAT3P3_VR, PLAT1P8_VR, HOST_VR, VREG_NUM } vreg_t;
9 QM_RW uint32_t *vreg[VREG_NUM] = {
10 &QM_SCSS_PMU->aon_vr, &QM_SCSS_PMU->plat3p3_vr, &QM_SCSS_PMU->plat1p8_vr,
11 &QM_SCSS_PMU->host_vr};
13 static int vreg_set_mode(
const vreg_t
id,
const vreg_mode_t mode)
15 QM_CHECK(mode < VREG_MODE_NUM, -EINVAL);
21 case VREG_MODE_SWITCHING:
23 vr &= ~QM_SCSS_VR_VREG_SEL;
25 case VREG_MODE_LINEAR:
27 vr |= QM_SCSS_VR_VREG_SEL;
29 case VREG_MODE_SHUTDOWN:
38 while ((mode == VREG_MODE_SWITCHING) &&
39 (*vreg[
id] & QM_SCSS_VR_ROK) == 0) {
47 QM_CHECK(mode < VREG_MODE_NUM, -EINVAL);
48 QM_CHECK(mode != VREG_MODE_SWITCHING, -EINVAL);
50 return vreg_set_mode(AON_VR, mode);
55 QM_CHECK(mode < VREG_MODE_NUM, -EINVAL);
56 return vreg_set_mode(PLAT3P3_VR, mode);
61 QM_CHECK(mode < VREG_MODE_NUM, -EINVAL);
62 return vreg_set_mode(PLAT1P8_VR, mode);
67 QM_CHECK(mode < VREG_MODE_NUM, -EINVAL);
68 return vreg_set_mode(HOST_VR, mode);
int vreg_plat3p3_set_mode(const vreg_mode_t mode)
Set Platform 3P3 Voltage Regulator mode.
int vreg_host_set_mode(const vreg_mode_t mode)
Set Host Voltage Regulator mode.
int vreg_plat1p8_set_mode(const vreg_mode_t mode)
Set Platform 1P8 Voltage Regulator mode.
int vreg_aon_set_mode(const vreg_mode_t mode)
Set AON Voltage Regulator mode.