9 #include "qm_soc_regs.h"
qm_uart_lc_t
UART Line control.
int qm_uart_dma_channel_config(const qm_uart_t uart, const qm_dma_t dma_ctrl_id, const qm_dma_channel_id_t dma_channel_id, const qm_dma_channel_direction_t dma_channel_direction)
Configure a DMA channel with a specific transfer direction.
int qm_uart_irq_read(const qm_uart_t uart, const qm_uart_transfer_t *const xfer)
Interrupt based RX on UART.
int qm_uart_dma_read(const qm_uart_t uart, const qm_uart_transfer_t *const xfer)
Perform a DMA-based RX transfer on the UART bus.
UART context to be saved between sleep/resume.
int qm_uart_save_context(const qm_uart_t uart, qm_uart_context_t *const ctx)
Save UART context.
5 data bits, odd parity, 1.5 stop bits.
UART asynchronous transfer structure.
int qm_uart_get_status(const qm_uart_t uart, qm_uart_status_t *const status)
Get UART bus status.
qm_uart_lc_t line_control
Line control (enum).
int qm_uart_dma_write_terminate(const qm_uart_t uart)
Terminate the current DMA TX transfer on the UART bus.
6 data bits, even parity, 2 stop bits.
uint8_t * data
Pre-allocated write or read buffer.
qm_uart_t
Number of UART controllers.
int qm_uart_dma_read_terminate(const qm_uart_t uart)
Terminate the current DMA RX transfer on the UART bus.
int qm_uart_irq_write(const qm_uart_t uart, const qm_uart_transfer_t *const xfer)
Interrupt based TX on UART.
7 data bits, no parity, 1 stop bit.
int qm_uart_write_non_block(const qm_uart_t uart, const uint8_t data)
UART character data write.
6 data bits, no parity, 2 stop bits.
8 data bits, even parity, 2 stop bits.
int qm_uart_read_non_block(const qm_uart_t uart, uint8_t *const data)
UART character data read.
5 data bits, odd parity, 1 stop bit.
5 data bits, even parity, 1 stop bit.
6 data bits, even parity, 1 stop bit.
bool hw_fc
Hardware Automatic Flow Control.
5 data bits, no parity, 1.5 stop bits.
6 data bits, odd parity, 1 stop bit.
qm_uart_status_t
UART Status type.
5 data bits, even par., 1.5 stop bits.
7 data bits, odd parity, 1 stop bit.
int qm_uart_set_config(const qm_uart_t uart, const qm_uart_config_t *const cfg)
Set UART configuration.
int qm_uart_restore_context(const qm_uart_t uart, const qm_uart_context_t *const ctx)
Restore UART context.
7 data bits, even parity, 1 stop bit.
int qm_uart_irq_write_terminate(const qm_uart_t uart)
Terminate UART IRQ TX transfer.
void * callback_data
Callback identifier.
qm_dma_channel_direction_t
DMA channel direction.
uint32_t baud_divisor
Baud Divisor.
7 data bits, odd parity, 2 stop bits.
6 data bits, odd parity, 2 stop bits.
7 data bits, even parity, 2 stop bits.
8 data bits, even parity, 1 stop bit.
5 data bits, no parity, 1 stop bit.
8 data bits, no parity, 2 stop bits.
qm_dma_channel_id_t
DMA channel IDs.
int qm_uart_write(const qm_uart_t uart, const uint8_t data)
UART character data write.
int qm_uart_irq_read_terminate(const qm_uart_t uart)
Terminate UART IRQ RX transfer.
UART configuration structure type.
8 data bits, odd parity, 2 stop bits.
uint32_t data_len
Number of bytes to transfer.
6 data bits, no parity, 1 stop bit.
int qm_uart_read(const qm_uart_t uart, uint8_t *const data, qm_uart_status_t *const status)
UART character data read.
int qm_uart_dma_write(const qm_uart_t uart, const qm_uart_transfer_t *const xfer)
Perform a DMA-based TX transfer on the UART bus.
8 data bits, odd parity, 1 stop bit.
7 data bits, no parity, 2 stop bits.
int qm_uart_write_buffer(const qm_uart_t uart, const uint8_t *const data, const uint32_t len)
UART multi-byte data write.
8 data bits, no parity, 1 stop bit.