5 #ifndef __FLASH_LAYOUT_H__
6 #define __FLASH_LAYOUT_H__
17 QM_RW uint16_t version;
18 QM_RW uint16_t reserved;
19 QM_RW uint16_t osc_trim_32mhz;
20 QM_RW uint16_t osc_trim_16mhz;
21 QM_RW uint16_t osc_trim_8mhz;
22 QM_RW uint16_t osc_trim_4mhz;
23 } qm_flash_otp_trim_t;
26 extern uint8_t test_flash_page[0x800];
27 #define QM_FLASH_OTP_TRIM_CODE_BASE (&test_flash_page[0])
29 #define QM_FLASH_OTP_TRIM_CODE_BASE (0xFFFFE1F0)
32 #define QM_FLASH_OTP_TRIM_CODE \
33 ((qm_flash_otp_trim_t *)QM_FLASH_OTP_TRIM_CODE_BASE)
34 #define QM_FLASH_OTP_SOC_DATA_VALID (0x24535021)
35 #define QM_FLASH_OTP_TRIM_MAGIC (QM_FLASH_OTP_TRIM_CODE->magic)
43 QM_RW uint16_t osc_trim_8mhz;
44 QM_RW uint16_t osc_trim_4mhz;
46 QM_RW uint32_t osc_trim_u32[2];
47 QM_RW uint16_t osc_trim_u16[4];
48 } qm_flash_data_trim_t;
51 #define QM_FLASH_DATA_TRIM_BASE (&test_flash_page[100])
52 #define QM_FLASH_DATA_TRIM_OFFSET (100)
54 #define QM_FLASH_DATA_TRIM_BASE (0x4002F000)
55 #define QM_FLASH_DATA_TRIM_OFFSET ((uint32_t)QM_FLASH_DATA_TRIM_BASE & 0x3FFFF)
58 #define QM_FLASH_DATA_TRIM ((qm_flash_data_trim_t *)QM_FLASH_DATA_TRIM_BASE)
59 #define QM_FLASH_DATA_TRIM_CODE (&QM_FLASH_DATA_TRIM->fields)
60 #define QM_FLASH_DATA_TRIM_REGION QM_FLASH_REGION_SYS
62 #define QM_FLASH_TRIM_PRESENT_MASK (0xFC00)
63 #define QM_FLASH_TRIM_PRESENT (0x0000)
70 #define BL_DATA_FLASH_REGION_BASE QM_FLASH_REGION_SYS_0_BASE
72 #define BL_DATA_SECTION_BASE_PAGE (94)
75 #define QM_FLASH_REGION_SYS_0_PAGES (96)
77 #define QM_FLASH_REGION_SYS_1_PAGES (96)