10 QM_CHECK(gpio < QM_SS_GPIO_NUM, -EINVAL);
12 (gpio == QM_SS_GPIO_0) ? QM_SS_GPIO_0_BASE : QM_SS_GPIO_1_BASE;
13 __builtin_arc_sr(QM_SS_GPIO_LS_SYNC_CLK_EN |
14 QM_SS_GPIO_LS_SYNC_SYNC_LVL,
15 addr + QM_SS_GPIO_LS_SYNC);
21 QM_CHECK(gpio < QM_SS_GPIO_NUM, -EINVAL);
23 (gpio == QM_SS_GPIO_0) ? QM_SS_GPIO_0_BASE : QM_SS_GPIO_1_BASE;
24 __builtin_arc_sr(0, addr + QM_SS_GPIO_LS_SYNC);
30 QM_CHECK(spi < QM_SS_SPI_NUM, -EINVAL);
31 int addr = (spi ==
QM_SS_SPI_0) ? QM_SS_SPI_0_BASE : QM_SS_SPI_1_BASE;
38 QM_CHECK(spi < QM_SS_SPI_NUM, -EINVAL);
39 int addr = (spi ==
QM_SS_SPI_0) ? QM_SS_SPI_0_BASE : QM_SS_SPI_1_BASE;
46 QM_CHECK(i2c < QM_SS_I2C_NUM, -EINVAL);
47 int addr = (i2c == QM_SS_I2C_0) ? QM_SS_I2C_0_BASE : QM_SS_I2C_1_BASE;
48 QM_SS_REG_AUX_OR(addr + QM_SS_I2C_CON, QM_SS_I2C_CON_CLK_ENA);
54 QM_CHECK(i2c < QM_SS_I2C_NUM, -EINVAL);
55 int addr = (i2c == QM_SS_I2C_0) ? QM_SS_I2C_0_BASE : QM_SS_I2C_1_BASE;
56 QM_SS_REG_AUX_NAND(addr + QM_SS_I2C_CON, QM_SS_I2C_CON_CLK_ENA);
64 QM_SS_ADC_CTRL_CLK_ENA);
72 QM_SS_ADC_CTRL_CLK_ENA);
89 reg &= ~(QM_SS_ADC_DIVSEQSTAT_CLK_RATIO_MASK);
int ss_clk_spi_enable(const qm_ss_spi_t spi)
Enable clocking for SS SPI peripheral.
int ss_clk_gpio_enable(const qm_ss_gpio_t gpio)
Enable clocking for SS GPIO peripheral.
ADC clock and sequencer status register.
qm_ss_gpio_t
Sensor Subsystem GPIO.
int ss_clk_i2c_disable(const qm_ss_i2c_t i2c)
Disable clocking for SS I2C peripheral.
qm_ss_i2c_t
Sensor Subsystem I2C.
int ss_clk_adc_set_div(const uint32_t div)
Set clock divisor for SS ADC.
int ss_clk_adc_disable(void)
Disable the SS ADC clock.
uint32_t clk_sys_get_ticks_per_us(void)
Get number of system ticks per micro second.
int ss_clk_spi_disable(const qm_ss_spi_t spi)
Disable clocking for SS SPI peripheral.
int ss_clk_gpio_disable(const qm_ss_gpio_t gpio)
Disable clocking for SS GPIO peripheral.
int ss_clk_i2c_enable(const qm_ss_i2c_t i2c)
Enable clocking for SS I2C peripheral.
qm_ss_spi_t
Sensor Subsystem SPI modules.
int ss_clk_adc_enable(void)
Enable the SS ADC clock.