Intel® Quark™ Microcontroller Software Interface  1.4.0
Intel® Quark™ Microcontroller BSP
SS Clock

Clock Management for Sensor Subsystem. More...

Enumerations

enum  ss_clk_periph_t {
  SS_CLK_PERIPH_ADC = BIT(31), SS_CLK_PERIPH_I2C_1 = BIT(30), SS_CLK_PERIPH_I2C_0 = BIT(29), SS_CLK_PERIPH_SPI_1 = BIT(28),
  SS_CLK_PERIPH_SPI_0 = BIT(27), SS_CLK_PERIPH_GPIO_1 = BIT(1), SS_CLK_PERIPH_GPIO_0 = BIT(0)
}
 Peripheral clocks selection type. More...
 

Functions

int ss_clk_gpio_enable (const qm_ss_gpio_t gpio)
 Enable clocking for SS GPIO peripheral. More...
 
int ss_clk_gpio_disable (const qm_ss_gpio_t gpio)
 Disable clocking for SS GPIO peripheral. More...
 
int ss_clk_spi_enable (const qm_ss_spi_t spi)
 Enable clocking for SS SPI peripheral. More...
 
int ss_clk_spi_disable (const qm_ss_spi_t spi)
 Disable clocking for SS SPI peripheral. More...
 
int ss_clk_i2c_enable (const qm_ss_i2c_t i2c)
 Enable clocking for SS I2C peripheral. More...
 
int ss_clk_i2c_disable (const qm_ss_i2c_t i2c)
 Disable clocking for SS I2C peripheral. More...
 
int ss_clk_adc_enable (void)
 Enable the SS ADC clock. More...
 
int ss_clk_adc_disable (void)
 Disable the SS ADC clock. More...
 
int ss_clk_adc_set_div (const uint32_t div)
 Set clock divisor for SS ADC. More...
 

Detailed Description

Clock Management for Sensor Subsystem.

The clock distribution has three level of gating:

  1. SE SoC gating through register CCU_PERIPH_CLK_GATE_CTL
  2. SS Soc gating through register IO_CREG_MST0_CTRL (IO_CREG_MST0_CTRL)
  3. SS peripheral clk gating Note: the first two are ungated by hardware power-on default (clock gating is done at peripheral level). Thus the only one level of control is enough (and implemented in ss_clk driver) to gate clock on or off to the particular peripheral.

Enumeration Type Documentation

Peripheral clocks selection type.

Enumerator
SS_CLK_PERIPH_ADC 

ADC clock selector.

SS_CLK_PERIPH_I2C_1 

I2C 1 clock selector.

SS_CLK_PERIPH_I2C_0 

I2C 0 clock selector.

SS_CLK_PERIPH_SPI_1 

SPI 1 clock selector.

SS_CLK_PERIPH_SPI_0 

SPI 0 clock selector.

SS_CLK_PERIPH_GPIO_1 

GPIO 1 clock selector.

Special domain peripherals - these do not map onto the standard register.

SS_CLK_PERIPH_GPIO_0 

GPIO 0 clock selector.

Special domain peripherals - these do not map onto the standard register.

Definition at line 31 of file ss_clk.h.

Function Documentation

int ss_clk_adc_disable ( void  )

Disable the SS ADC clock.

Returns
Standard errno return type for QMSI.
Return values
0on success.

Definition at line 68 of file ss_clk.c.

References QM_SS_ADC_CTRL.

int ss_clk_adc_enable ( void  )

Enable the SS ADC clock.

Returns
Standard errno return type for QMSI.
Return values
0on success.

Definition at line 60 of file ss_clk.c.

References QM_SS_ADC_CTRL.

int ss_clk_adc_set_div ( const uint32_t  div)

Set clock divisor for SS ADC.

Note: If the system clock speed is changed, the divisor must be recalculated. The minimum supported speed for the SS ADC is 0.14 MHz. So for a system clock speed of 1 MHz, the max value of div is 7, and for 32 MHz, the max value is

  1. System clock speeds of less than 1 MHz are not supported by this function.
Parameters
[in]divADC clock divider value.
Returns
Standard errno return type for QMSI.
Return values
0on success.
Negativeerrno for possible error codes.

Definition at line 76 of file ss_clk.c.

References clk_sys_get_ticks_per_us(), and QM_SS_ADC_DIVSEQSTAT.

int ss_clk_gpio_disable ( const qm_ss_gpio_t  gpio)

Disable clocking for SS GPIO peripheral.

Parameters
[in]gpioGPIO port index.
Returns
Standard errno return type for QMSI.
Return values
0on success.
Negativeerrno for possible error codes.

Definition at line 19 of file ss_clk.c.

int ss_clk_gpio_enable ( const qm_ss_gpio_t  gpio)

Enable clocking for SS GPIO peripheral.

Parameters
[in]gpioGPIO port index.
Returns
Standard errno return type for QMSI.
Return values
0on success.
Negativeerrno for possible error codes.

Definition at line 8 of file ss_clk.c.

int ss_clk_i2c_disable ( const qm_ss_i2c_t  i2c)

Disable clocking for SS I2C peripheral.

Parameters
[in]i2cI2C port index.
Returns
Standard errno return type for QMSI.
Return values
0on success.
Negativeerrno for possible error codes.

Definition at line 52 of file ss_clk.c.

int ss_clk_i2c_enable ( const qm_ss_i2c_t  i2c)

Enable clocking for SS I2C peripheral.

Parameters
[in]i2cI2C port index.
Returns
Standard errno return type for QMSI.
Return values
0on success.
Negativeerrno for possible error codes.

Definition at line 44 of file ss_clk.c.

int ss_clk_spi_disable ( const qm_ss_spi_t  spi)

Disable clocking for SS SPI peripheral.

Parameters
[in]spiSPI port index.
Returns
Standard errno return type for QMSI.
Return values
0on success.
Negativeerrno for possible error codes.

Definition at line 36 of file ss_clk.c.

References QM_SS_SPI_0, and QM_SS_SPI_CTRL.

int ss_clk_spi_enable ( const qm_ss_spi_t  spi)

Enable clocking for SS SPI peripheral.

Parameters
[in]spiSPI port index.
Returns
Standard errno return type for QMSI.
Return values
0on success.
Negativeerrno for possible error codes.

Definition at line 28 of file ss_clk.c.

References QM_SS_SPI_0, and QM_SS_SPI_CTRL.