5 #ifndef __QM_SS_POWER_STATES_H__
6 #define __QM_SS_POWER_STATES_H__
9 #include "qm_sensor_regs.h"
50 #if (ENABLE_RESTORE_CONTEXT)
151 #if (ENABLE_RESTORE_CONTEXT) && (!UNIT_TEST)
159 #define qm_ss_set_resume_vector(_restore_label, arc_restore_addr) \
160 __asm__ __volatile__("mov r0, @arc_restore_addr\n\t" \
161 "st " #_restore_label ", [r0]\n\t" \
173 #define qm_ss_save_context(cpu_context) \
174 __asm__ __volatile__("push_s r0\n\t" \
175 "mov r0, @cpu_context\n\t" \
176 "st r1, [r0, 4]\n\t" \
177 "st r2, [r0, 8]\n\t" \
178 "st r3, [r0, 12]\n\t" \
179 "st r4, [r0, 16]\n\t" \
180 "st r5, [r0, 20]\n\t" \
181 "st r6, [r0, 24]\n\t" \
182 "st r7, [r0, 28]\n\t" \
183 "st r8, [r0, 32]\n\t" \
184 "st r9, [r0, 36]\n\t" \
185 "st r10, [r0, 40]\n\t" \
186 "st r11, [r0, 44]\n\t" \
187 "st r12, [r0, 48]\n\t" \
188 "st r13, [r0, 52]\n\t" \
189 "st r14, [r0, 56]\n\t" \
190 "st r15, [r0, 60]\n\t" \
191 "st r16, [r0, 64]\n\t" \
192 "st r17, [r0, 68]\n\t" \
193 "st r18, [r0, 72]\n\t" \
194 "st r19, [r0, 76]\n\t" \
195 "st r20, [r0, 80]\n\t" \
196 "st r21, [r0, 84]\n\t" \
197 "st r22, [r0, 88]\n\t" \
198 "st r23, [r0, 92]\n\t" \
199 "st r24, [r0, 96]\n\t" \
200 "st r25, [r0, 100]\n\t" \
201 "st r26, [r0, 104]\n\t" \
202 "st r27, [r0, 108]\n\t" \
203 "st r28, [r0, 112]\n\t" \
204 "st r29, [r0, 116]\n\t" \
205 "st r30, [r0, 120]\n\t" \
206 "st r31, [r0, 124]\n\t" \
207 "lr r31, [ic_ctrl]\n\t" \
208 "st r31, [r0, 128]\n\t" \
211 [ic_ctrl] "i"(QM_SS_AUX_IC_CTRL) \
223 #define qm_ss_restore_context(_restore_label, cpu_context) \
224 __asm__ __volatile__( \
227 "mov r0, @cpu_context\n\t" \
228 "ld r1, [r0, 4]\n\t" \
229 "ld r2, [r0, 8]\n\t" \
230 "ld r3, [r0, 12]\n\t" \
231 "ld r4, [r0, 16]\n\t" \
232 "ld r5, [r0, 20]\n\t" \
233 "ld r6, [r0, 24]\n\t" \
234 "ld r7, [r0, 28]\n\t" \
235 "ld r8, [r0, 32]\n\t" \
236 "ld r9, [r0, 36]\n\t" \
237 "ld r10, [r0, 40]\n\t" \
238 "ld r11, [r0, 44]\n\t" \
239 "ld r12, [r0, 48]\n\t" \
240 "ld r13, [r0, 52]\n\t" \
241 "ld r14, [r0, 56]\n\t" \
242 "ld r15, [r0, 60]\n\t" \
243 "ld r16, [r0, 64]\n\t" \
244 "ld r17, [r0, 68]\n\t" \
245 "ld r18, [r0, 72]\n\t" \
246 "ld r19, [r0, 76]\n\t" \
247 "ld r20, [r0, 80]\n\t" \
248 "ld r21, [r0, 84]\n\t" \
249 "ld r22, [r0, 88]\n\t" \
250 "ld r23, [r0, 92]\n\t" \
251 "ld r24, [r0, 96]\n\t" \
252 "ld r25, [r0, 100]\n\t" \
253 "ld r26, [r0, 104]\n\t" \
254 "ld r27, [r0, 108]\n\t" \
255 "ld r28, [r0, 112]\n\t" \
256 "ld r29, [r0, 116]\n\t" \
257 "ld r30, [r0, 120]\n\t" \
258 "ld r31, [r0, 124]\n\t" \
259 "ld r0, [r0, 128]\n\t" \
260 "sr r0, [ic_ctrl]\n\t" \
264 "sr -1,[0x102]\n\t" \
267 [ic_ctrl] "i"(QM_SS_AUX_IC_CTRL) \
271 #define qm_ss_set_resume_vector(_restore_label, arc_restore_addr)
272 #define qm_ss_save_context(cpu_context)
273 #define qm_ss_restore_context(_restore_label, cpu_context)
void qm_ss_power_cpu_ss1(const qm_ss_power_cpu_ss1_mode_t mode)
Enter Sensor SS1 state.
void qm_ss_power_cpu_ss2(void)
Enter Sensor SS2 state or SoC LPSS state.
void qm_ss_power_sleep_wait(void)
Save context, enter ARC SS1 power save state and restore after wake up.
void qm_power_soc_set_ss_restore_flag(void)
Enable the SENSOR startup restore flag.
Disable SS Timers in SS1.
void qm_ss_power_soc_sleep_restore(void)
Enter SoC sleep state and restore after wake up.
void qm_ss_power_soc_lpss_disable(void)
Disable LPSS state entry.
qm_ss_power_cpu_ss1_mode_t
Sensor Subsystem SS1 Timers mode type.
Keep SS Timers enabled in SS1.
void qm_ss_power_soc_lpss_enable(void)
Enable LPSS state entry.
void qm_ss_power_soc_deep_sleep_restore(void)
Enter SoC sleep state and restore after wake up.