6 #include "qm_interrupt.h"
7 #include "qm_interrupt_router.h"
9 static void (*callback[QM_FLASH_NUM])(
void *);
10 static void *callback_data[QM_FLASH_NUM];
14 if (callback[QM_FLASH_0]) {
15 (*callback[QM_FLASH_0])(callback_data[QM_FLASH_0]);
17 QM_FLASH[QM_FLASH_0]->mpr_vsts = QM_FPR_MPR_VSTS_VALID;
19 QM_ISR_EOI(QM_IRQ_FLASH_MPR_0_INT_VECTOR);
25 if (callback[QM_FLASH_1]) {
26 (*callback[QM_FLASH_1])(callback_data[QM_FLASH_1]);
28 QM_FLASH[QM_FLASH_1]->mpr_vsts = QM_FPR_MPR_VSTS_VALID;
30 QM_ISR_EOI(QM_IRQ_FLASH_MPR_1_INT_VECTOR);
38 QM_CHECK(flash < QM_FLASH_NUM, -EINVAL);
39 QM_CHECK(
id < QM_FPR_NUM, -EINVAL);
41 QM_CHECK(cfg != NULL, -EINVAL);
51 ((cfg->
up_bound + QM_FLASH_REGION_DATA_BASE_OFFSET)
52 << QM_FPR_UPPER_BOUND_OFFSET) |
53 (cfg->
low_bound + QM_FLASH_REGION_DATA_BASE_OFFSET);
59 (cfg->
up_bound << QM_FPR_UPPER_BOUND_OFFSET) |
72 qm_fpr_callback_t callback_fn,
void *data)
75 QM_CHECK(flash < QM_FLASH_NUM, -EINVAL);
76 volatile uint32_t *int_flash_controller_mask =
77 &QM_INTERRUPT_ROUTER->flash_mpr_0_int_mask;
82 callback[flash] = callback_fn;
83 callback_data[flash] = data;
85 QM_IR_UNMASK_INTERRUPTS(int_flash_controller_mask[flash]);
87 QM_IR_MASK_HALTS(int_flash_controller_mask[flash]);
89 QM_SCSS_SS->ss_cfg &= ~QM_SS_STS_HALT_INTERRUPT_REDIRECTION;
94 QM_IR_MASK_INTERRUPTS(int_flash_controller_mask[flash]);
96 QM_IR_UNMASK_HALTS(int_flash_controller_mask[flash]);
107 QM_SCSS_SS->ss_cfg |=
108 QM_SS_STS_HALT_INTERRUPT_REDIRECTION;
110 QM_SCSS_SS->ss_cfg &=
111 ~QM_SS_STS_HALT_INTERRUPT_REDIRECTION;
121 qm_fpr_callback_t callback_fn,
void *data)
124 QM_CHECK(flash < QM_FLASH_NUM, -EINVAL);
125 volatile uint32_t *int_flash_controller_mask =
126 &QM_INTERRUPT_ROUTER->flash_mpr_0_int_mask;
131 callback[flash] = callback_fn;
132 callback_data[flash] = data;
135 if (flash == QM_FLASH_0) {
136 QM_IR_UNMASK_INT(QM_IRQ_FLASH_MPR_0_INT);
139 QM_IR_UNMASK_INT(QM_IRQ_FLASH_MPR_1_INT);
143 QM_IR_MASK_HALTS(int_flash_controller_mask[flash]);
145 QM_SCSS_PMU->p_sts &= ~QM_P_STS_HALT_INTERRUPT_REDIRECTION;
151 if (flash == QM_FLASH_0) {
152 QM_IR_MASK_INT(QM_IRQ_FLASH_MPR_0_INT);
155 QM_IR_MASK_INT(QM_IRQ_FLASH_MPR_1_INT);
159 QM_IR_UNMASK_HALTS(int_flash_controller_mask[flash]);
170 QM_SCSS_PMU->p_sts |=
171 QM_P_STS_HALT_INTERRUPT_REDIRECTION;
173 QM_SCSS_PMU->p_sts &=
174 ~QM_P_STS_HALT_INTERRUPT_REDIRECTION;
181 #if (ENABLE_RESTORE_CONTEXT)
184 QM_CHECK(flash < QM_FLASH_NUM, -EINVAL);
185 QM_CHECK(ctx != NULL, -EINVAL);
190 for (i = 0; i < QM_FPR_NUM; i++) {
200 QM_CHECK(flash < QM_FLASH_NUM, -EINVAL);
201 QM_CHECK(ctx != NULL, -EINVAL);
206 for (i = 0; i < QM_FPR_NUM; i++) {
int qm_fpr_set_violation_policy(const qm_fpr_viol_mode_t mode, const qm_flash_t flash, qm_fpr_callback_t callback_fn, void *data)
Configure FPR violation behaviour.
uint8_t low_bound
1KB-aligned lower Flash phys addr.
Flash Protection Region configuration structure.
int qm_fpr_restore_context(const qm_flash_t flash, const qm_fpr_context_t *const ctx)
Restore FPR context.
qm_fpr_read_allow_t allow_agents
Per-agent read enable bitmask.
Enter probe mode on violation.
qm_flash_t
Number of Flash controllers.
uint8_t up_bound
1KB-aligned upper Flash phys addr.
uint32_t fpr_rd_cfg[QM_FPR_NUM]
Flash Protection Region Read Control Register.
int qm_fpr_set_config(const qm_flash_t flash, const qm_fpr_id_t id, const qm_fpr_config_t *const cfg, const qm_flash_region_type_t region)
Configure a Flash controller's Flash Protection Region.
qm_fpr_en_t en_mask
Enable/lock bitmask.
Generate interrupt on violation.
QM_ISR_DECLARE(qm_flash_mpr_0_isr)
ISR for FPR 0 interrupt.
QM_RW uint32_t fpr_rd_cfg[4]
4 FPR_RD_CFG registers
int qm_fpr_save_context(const qm_flash_t flash, qm_fpr_context_t *const ctx)
Save FPR context.
qm_fpr_id_t
FPR register map.
qm_fpr_viol_mode_t
FPR violation mode type.
qm_flash_region_type_t
FPR region type.