============================================================================= Intel(R) Server Board SE7501CW2 BIOS RELEASE NOTES ============================================================================= Intel Enterprise Platform & Services Marketing Intel Corporation 2111 N.E. 25th Avenue, Hillsboro, OR 97124 USA ============================================================================= DATE: September 13, 2004 TO: Intel(R) server board SE7501CW2 customers SUBJECT: BIOS Release Notes Production 09 (build 0027) ============================================================================= Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. 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Copyright (c) 2004 Intel Corporation. ============================================================================= ABOUT THIS RELEASE ============================================================================= Build # : 0027 (V1.08) Build Stamp : SE7501CW20.86B.0027.P09.0409082327 Build Date : 08 September 2004 Checksum : 39B9 ============================================================================= BIOS COMPONENTS/CONTENTS ============================================================================= PXE 1 Ver. : PXE 2.1 Build 083(WfM 2.0) RPL V1.11, Boot Agent V1.1.07 PXE 2 Ver. : PXE 2.1 Build 083(WfM 2.0) RPL V2.74, Boot Agent V4.1.06 VGA Ver. : ATI* RAGE* XL GR-xlamis3y.109-4.332 BIOS Base : Phoenix* 4.0 release 6.0 Processor stepping(s) supported: Intel® Xeon™ Processors 1.8 GHz, 2.0 GHz, 2.2 GHz, 2.4 GHz, 2.6 GHz, 2.8 GHz, 3.06 GHz, 3.2 GHz for CPUID 0F24h, 0F27h, 0F29h, 0F25h (Front Side Bus 400MHz/533MHz) Microcode update versions: CPUID Microcode update ID 0F24h 1F(M02F241F) 0F27h 38(M02F2738) 0F29h 2D(M02F292D) 0F25h 29(M01F2529) ============================================================================= SUPPORTED FUNCTIONALITY ============================================================================= 01. MPS V1.4 02. APIC & PIC modes 03. 1 CPU / 2 CPUs Intel® Xeon(tm) processors with 400MHz/533MHz for CPU id 0F24/0F27/0F29/0F25 (B0/C1/D1/M0 Stepping) 04. Four Registered DIMMs DDR200/DDR266 05. Slot1: PCI-X 133 06. Slot2/Slot3: PCI-X 100 07. Slot4/Slot5: PCI 32/33 08. USB 1.1 Ports 09. Onboard PCI devices VGA(ATI* Rage* XL with 8MB video memory) / NIC1 (Intel® 82550PM Pro100 network controller) / NIC2 (Intel® 82540EM network controller Pro1000) 10. PS2 KB/ PS2 MS/COMA/COMB/Parallel/Floppy ports 11. ICH3 IDE(ATA100) primary/secondary channel 12. POST code to Port 80h 13. Multi-boot support 14. BIOS warning messages in English assuming video is available instead of beep codes 15. Intel® Hyper-Threading Technology 16. BIOS support processor Micro-code updates (POST & Runtime) 17. Clear CMOS 18. BIOS Setup screen 19. BIOS POST message 20. BIOS Summary screen 21. Clear password 22. BIOS update under DOS 23. Disable onboard devices by BIOS (VGA/NIC1/NIC2/USBs) 24. Disable PCI device Option ROMs (Slot1/2/3/4/5) 25. Onboard Base modes detection to show to BIOS setup 26. Legacy USB KB/MS 27. Error handing for post error code (Event logging to flash ROM) 28. ACPI SPCR (Serial Port Console Redirection) 29. Clock Spectrum Spread enabled 30. OS: Windows 2000(ACPI, MPS, PIC) / Windows 2003 Enterprise & Standard / Linux 31. Memory > 4GB support 32. Password on Setup 33. Password on Boot 34. WOL(Wakeup On LAN)/WOR(Wakeup On Ring) via power button for non-ACPI mode 35. ACPI 1.0b(S0,S4,S5) 36. Boot without mouse. 37. Boot without keyboard. 38. BIOS Recovery from legacy & USB1.1 floppy with Video. 39. El Torito multi-bootable image support. 40. After G3 to "latest/OFF" state. 41. Power Switch Disable after POST (ACPI & non-ACPI). 42. Single DIMM in slot 1A. ============================================================================= SYSTEM FIRMWARE REQUIREMENTS/REVISIONS ============================================================================= ============================================================================= IMPORTANT INSTALLATION NOTES ============================================================================= IMPORTANT NOTES: 1. Extract phlash16.exe, AUTOEXEC.BAT, OEMPHL.EXE, OPTIONS.BAT, 1.bat, 2.bat and BIOS.wph to a 1.44 floppy diskette. 2. Boot the system to pure DOS mode. 3. Run A:> 1.bat for auto mode, 2.bat for user mode. 4. When BIOS flash is over it will show message and beep, then reboot. Note: The boot to DOS must be non-HIMEM management environment. ============================================================================= KNOWN ISSUES/WORKAROUNDS ============================================================================= ============================================================================= FEATURES ADDED ============================================================================= Build 0027: - Add 'Power On' option into BIOS 'Power Loss Control'. Build 0026: - None. Build 0025: - Add the function "CPU Swapping". - Remove the function "Fan Control". - Add the customer's feature "EtherBoot". Note: Reserve two blocks "FFF00000h - FFF0FFFFh" and "FFF10000h - FFF1FFFF" in the flash ROM to support the feature "EtherBoot". The special OPROM of NIC 82540 should be only placed in the block "FFF00000h - FFF0FFFFh". The special OPROM of NIC 82550 should be only placed in the block "FFF10000h - FFF1FFFFh". ============================================================================= ISSUES FIXED ============================================================================= Build 0027: - System hangs at POST code 67 sometimes during Windows* 2000 continuous reboot test (With new 2.4G/533FSB CPU, 80532KE0561M). - Upgrade the micro code for D-1 and M-0 stepping CPU. a. D-1 stepping CPU Patch ID: 018h => 02Dh b. M-0 stepping CPU Patch ID: 014h => 029h Build 0026: - Defect ID 65139, [XX] - SR1350-E Mitsumi Slimline CD-ROM fails on with certain multi-adapter backplane (Note two types exist) - one works, the other is not recognized. - Upgrade the micro code for D-1 and M-0 stepping CPU to support Intel(r) Xeon(tm) 3.2 Ghz 2M L3 cache based processors. a. D-1 stepping CPU Patch ID: 015h => 018h b. M-0 stepping CPU Patch ID: 011h => 014h Build 0025: - Fixed bug: The system will halt at the POST code "93h" during the BSP is D-1 stepping CPU and the AP is M-0 stepping CPU. - Fixed bug: Mixing D-1 and M-0 stepping processor without L3 cache must now be supported according to new Processor Spec Update. - Fixed bug: CPU Speed displayed incorrectly in BIOS Setup for 3.20GHz 1MB M-0 Prestonia CPUs. - Upgraded the micro code for B-0, C-1 and D-1 stepping CPU. a. B-0 stepping CPU Patch ID: 01Dh => 01Fh b. C-1 stepping CPU Patch ID: 034h => 038h c. D-1 stepping CPU Patch ID: 0Fh => 015h Build 0024: - Fixed defect ID 65121- No video after power-off/on from panel switch during BIOS post. ============================================================================= REFERENCE MATERIAL ============================================================================= Intel Server Board SE7501CW2 TPS v1.1. ============================================================================= BIOS RECOVERY INSTRUCTIONS ============================================================================= 1.The crisdisk.exe content: CRISBOOT.BIN - Boot sector image PHLASH16.EXE - Execution file to program BIOS image to flash ROM BIOS.WPH - Actual BIOS image and platform information image MINIDOS.SYS - Allows the system to boot in crisis recovery mode. MAKEBOOT.EXE - Creates the boot sector on the crisis recovery diskette. WINCRIS.EXE - Creates the crisis recovery disk under Windows* operating systems. WINCRIS.HLP - Help file for WINCRIS.EXE 2.Under Windows* operating system environment to build crisis recovery diskette as below: a. Boot to Windows. b. Execute C:\PHLASH>WINCRIS.EXE c. Follow its prompts to build crisis recovery diskette. 3.Please follow the steps to force to execute BIOS recovery. a. Auto recovery: If ROM checksum is error during POST (boot block), system will automatically perform BIOS recovery. b. User Recovery: 1. Power off system. 2. Plug jumper to motherboard J32 pin 3-4. 3. Insert recovery diskette to floppy 4. Power on system. 5. System will beep and display onboard video during recovery. 6. After no beep and no error message, the recovery is OK. 7. Power off system 8. Remove jumper from motherboard J32 pin 3-4. [END OF RELEASE NOTES]